中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

导航

电子与封装 ›› 2021, Vol. 21 ›› Issue (12): 120106 . doi: 10.16257/j.cnki.1681-1070.2021.1211

所属专题: 集成电路测试与可靠性

• “集成电路测试与可靠性”专题 • 上一篇    下一篇

基于数据分析科学降低芯片测试成本*

王彬;刘伟;周成   

  1. 中科芯集成电路有限公司,江苏 无锡 214072
  • 收稿日期:2021-05-24 出版日期:2021-12-28 发布日期:2021-08-24
  • 作者简介:王彬(1982—),男,吉林省吉林市人,硕士,高级工程师,主要从事集成电路验证、应用、可靠性、失效分析研究。

Reduce theCost of Chip Testing Based on Data Analysis

WANG Bin, LIU Wei, ZHOU Cheng   

  1. China Key System & IntegratedCircuit Co., Ltd., Wuxi 214072, China
  • Received:2021-05-24 Online:2021-12-28 Published:2021-08-24

摘要: 随着集成电路的快速发展和工业物联网时代的逐渐到来,高性能、高可靠性的芯片制造成本越来越高。为保证芯片高质量生产,芯片的测试参数需要全覆盖,导致芯片测试所需的时间较长,成本较高。为降低芯片测试的成本,从数据分析的角度出发,就如何在保证产品质量的前提下科学降低芯片测试的时间和成本进行了研究。通过对实际测试数据的统计分析,表明所提方法可有效降低芯片测试的时间和成本。

关键词: 晶圆测试, 晶圆可接受度测试, 成测, 数据分析

Abstract: With the rapid development of integrated circuits and the advent of the era of industrial internet of things, the cost of high-performance and high reliability chip manufacturing is getting higher and higher. In order to ensure the high quality of chip production, the test parameters of chip test need to be fully covered, which leads to the long time and high cost of chip test. Therefore, in order to reduce the cost of chip testing, how to scientifically reduce the time and cost of chip testing under the premise of ensuring product quality from the perspective of data analysis is studied. The statistical analysis of the actual test data shows that the proposed method can effectively reduce the time and cost of chip testing.

Key words: wafertest, waferacceptationtest, finaltest, dataanalysis

中图分类号: