中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2022, Vol. 22 ›› Issue (8): 080205 . doi: 10.16257/j.cnki.1681-1070.2022.0809

• 封装、组装与测试 • 上一篇    下一篇

针对DSP的系统级封装设计和应用

邢正伟1;许聪1,2;丁震1;陈康喜1   

  1. 1. 安徽芯纪元科技有限公司,合肥 230000;2. 中国电子科技集团公司第三十八研究所,合肥 230000
  • 收稿日期:2021-11-19 出版日期:2022-08-26 发布日期:2022-04-01
  • 作者简介:邢正伟(1991—),男,安徽滁州人,硕士,助理工程师,从事封装工艺与仿真研究。

Design and Application of System in Package for DSP

XING Zhengwei1, XU Cong1,2, DING Zhen1, CHEN Kangxi1   

  1. 1. Anhui Siliepoch Technology Co., Ltd., Hefei 230000, China; 2. The 38th Institute of China Electronics Technology Group Corporation, Hefei 230000, China
  • Received:2021-11-19 Online:2022-08-26 Published:2022-04-01

摘要: 随着雷达装备一体化需求的发展,对分系统或模块的质量和大小提出更严苛的要求,轻质化、小型化、系统化是未来整机的发展趋势。通过对多片数字信号处理器(DSP)芯片进行系统级封装设计,系统体积缩小到封装前尺寸的24%,仿真结果显示该系统的电源平面在30 MHz内无明显谐振,高速信号的插入损耗大于等于-3 dB@5 GHz,回波损耗小于等于-14 dB@5 GHz,仿真眼图的眼高314 mV,眼宽0.68 UI,满足信号完整性要求,热分析发现,经过散热处理模块最高结温55.8 ℃,满足实际需求。通过工程应用测试,该方案相比于传统方案,具有体积小、使用简单的特点。

关键词: 数字信号处理器, 系统级封装, 插入损耗

Abstract: With the development of radar equipment integration requirements, more stringent requirements are put forward on the quality and size of subsystems or modules. Lightweight, miniaturization and systematization are the development trends of the whole machine. The system size is reduced to 24% of the pre-package size by the system-level package design of multiple digital signal processor (DSP) chips. The simulation results show that the power plane of the system has no obvious resonance within 30 MHz, and the insertion loss of high-speed signal is greater than or equal to-3 dB@5 GHz, the return loss is less than or equal to -14 dB@5 GHz, the eye height of the simulated eye diagram is 314 mV, and the eye width is 0.68 UI, which meet the requirements of signal integrity. Thermal analysis shows that the highest junction temperature of the heat dissipation module is 55.8 ℃, which meets the actual requirements. Through the engineering application test, the scheme has the characteristics of small volume and simple operation compared with the traditional scheme.

Key words: digital signal processor, system in package, insertion loss

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