基于片上网络互连的多核缓存一致性研究综述*

doi:10.16257/j.cnki.1681-1070.2020.1114

摘要/Abstract

摘要： 随着多核处理器的集成规模不断扩大，片上互连由总线发展到片上网络，传统的缓存一致性协议不再适应新的片上网络（NoC）环境，缓存一致性问题凸显成为制约多核系统性能的瓶颈之一。从多核一致性问题的产生出发，分析了互连结构对缓存一致性的影响，分别从存在的困难和优化的角度综述了侦听协议、目录协议、令牌（Token）协议等的发展现状。总结了当前一致性协议发展过程中面临的问题，并对未来发展方向做了展望。

关键词: 多核系统, 片上网络, 缓存一致性协议

Abstract: With the continuous expansion of the integration scale of multi-core processors, the on-chip interconnection has evolved from the bus to the on-chip network. The traditional cache coherence protocol no longer adapts to the new network-on-chip (NoC) environment, and the problem of cache coherence is highlighted. It has become one of the bottlenecks restricting the performance of multi-core systems. Starting from the generation of multi-core consistency problems, the article analyzes the impact of interconnection structure on cache consistency, and summarizes the development status of snooping protocols, directory protocols, and token protocols from the perspective of existing difficulties and optimization. It summarizes the problems faced in the development process of the current protocols and gives a prospect for the future development direction.

Key words: multicore system, network-on-chip, cache coherency protocol

中图分类号:

TN402

陈家豪;黄乐天;谢暄;魏敬和. 基于片上网络互连的多核缓存一致性研究综述^*[J]. 电子与封装, 2020, 20(11): 110101 .

CHEN Jiahao, HUANG Letian, XIE Xuan, WEI Jinghe. Review ofMulticore Cache Coherence Based on Network-on-Chip Interconnection[J]. Electronics & Packaging, 2020, 20(11): 110101 .

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中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

基于片上网络互连的多核缓存一致性研究综述^*

Review ofMulticore Cache Coherence Based on Network-on-Chip Interconnection

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