关键词: 关键词:逐次逼近型模数转换器, 前台数字校准算法, 电容失配, 全差分, 分段电容数模转换器

Abstract: A foreground digital calibration algorithm for 14 bit successive approximation analog-to-digital converter (SAR ADC) is introduced. In order to reduce the area and improve the matching accuracy, a capacitor array digital-to-analog converter (DAC) architecture is adopted. In order to improve the signal to noise ratio of ADC, a differential input structure is adopted. For the influence of capacitor mismatch in capacitor array, a foreground digital algorithm that can be stored to correct the capacitor error is proposed. The large mismatched capacitor array is corrected by an error-correcting iteration using a near-ideal DAC array, and the true capacitance weight is obtained by eliminating noise through 1024 cumulative iterations. After calibration, the signal to noise distortion ratio? (SNDR) reaches 82 dB and the stray free dynamic range (SFDR) reaches 93 dB.

Key words: successive approximation analog-to-digitalconverter, foreground digital calibration algorithm, capacitance mismatch, fully differential, segmented capacitor DAC