中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2018, Vol. 18 ›› Issue (3): 40 -43. doi: 10.16257/j.cnki.1681-1070.2018.0033

• 微电子制造与可靠性 • 上一篇    下一篇

0.8 μm高压BCD电路漏电失效改善

向璐,陈洪雷,苏兰娟   

  1. 杭州士兰集成电路有限公司,杭州 310018
  • 收稿日期:2017-12-19 出版日期:2018-03-20 发布日期:2018-03-20
  • 作者简介:向璐(1978—),女,四川射洪人,毕业于四川大学物理系微电子学专业,中级职称,从事半导体制造工艺研发及工艺集成相关工作。

Leakage Failure Improvement of 0.8 μm High Voltage BCD Circuits

XIANG Lu,CHEN Honglei,SU Lanjuan   

  1. Hangzhou Silan Integrated Circuits Co.Ltd.,Hangzhou 310018,China
  • Received:2017-12-19 Online:2018-03-20 Published:2018-03-20

摘要: 0.8 μm高压BCD(Bipolar-CMOS-DMOS)电路存在漏电失效,其失效原因是IMD(Inter-Metal Dielectric)平坦化不良,造成金属2残留短路。通过SOG(spin-on-glass)二次平坦化工艺,大幅改善了IMD的平坦化效果,将平坦化因子由0.35提升到0.90,杜绝了金属2残留,较好地解决了漏电问题,提高了电路成品率。

关键词: BCD, SOG, 平坦化, 漏电失效

Abstract: The leakage failure existingin 0.8 μm high voltage Bipolar-CMOS-DMOS(BCD)circuits iscaused bythe metal 2 residual during the poor planarization of inter-metal dielectric(IMD)and the resultedcircuit-short of different metal 2 lines.Inthe paper,by developing the twice planarization technology of spin-on-glass(SOG),the planarization effect of IMD is significantly improved with an increasingdegree of planarization from 0.35 to 0.90 and an elimination of the metal 2 residual. As a result, the leakagefailureproblem is successfullysolved and the yield of circuits is improved.

Key words: BCD, SOG, planarization, leakage failure

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