关键词: Viterbi译码, 卷积编码, 分支度量, 加比选, FPGA

Abstract: To solve the problems of traditional Viterbi decoder such as complicated structure, large decoding delay and high resource consumption in the communication system, a new Viterbi decoder design based on FPGA is proposed. In combination with the working principle of (2,1,7) convolutional encoder and Viterbi decoder, the core components of Viterbi decoder are designed in detail. 3-bit soft-decision decoding is adopted specifically, the branch metric is calculated by using the Manhattan distance, 32 butterfly-type add-compare-select subunits are operated side-by-side, and the calculation of survival path and survival information is completed. Viterbi truncated decoding algorithm is used in the module of survival path management, and backtracking operations are divided into data write, backtracking read and decoding read. Decoding operation is performed with improved pipelining concurrently so that decoding delay and storage space are reduced to and respectively.

Key words: Viterbi decoding, convolutional encoding, branch metric, add-compare-select, FPGA