中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

导航

电子与封装 ›› 2016, Vol. 16 ›› Issue (4): 21 -23. doi: 10.16257/j.cnki.1681-1070.2016.0044

• 电路设计 • 上一篇    下一篇

一种基于Scanchain的Block RAM的MBIST设计方法

丛红艳,闫华,胡凯,张艳飞   

  1. 无锡中微亿芯有限公司,江苏 无锡 214072
  • 收稿日期:2016-01-28 出版日期:2016-04-20 发布日期:2016-04-20
  • 作者简介:丛红艳(1983—),女,山东威海人,硕士,工程师,研究方向为千万门级FPGA设计与验证。

A Design of MBIST Based on Scan Chain Block RAM

CONG Hongyan, YAN Hua, HU Kai, ZHANG Yanfei   

  1. East Technologies, Inc,Wuxi 214072, China
  • Received:2016-01-28 Online:2016-04-20 Published:2016-04-20

摘要: 基于March C+算法,设计了一种基于Scan chain的Block RAM为测试对象的串/并行BIST电路。在电路内部自身生成测试向量,不需要外部施加激励,并依靠自身决定得到测试结果是否正确。该电路既可以有效对Block RAM进行准确校验和故障定位,又不会因BIST测试增加PAD的数量。最后,对设计方法结果进行了仿真验证。

关键词: MarchC+算法, BIST电路, 故障定位

Abstract: In the paper, the algorithm based on March C+ designing a serial/parallel BIST of Based onScan chain dual port Block RAM. The cirtuit generate the test vector, not require an external stimulus, and rely on their own decisions and get the test result is correct, the circuit notonly can be effective for BRAM accurately check and fault location, but also cannot increase the number of PAD. Finally, the paper show the system simulation.

Key words: the algorithm based on March C+, BIST cirtuit, fault local

中图分类号: