中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2017, Vol. 17 ›› Issue (10): 42 -44. doi: 10.16257/j.cnki.1681-1070.2017.0124

• 微电子制造与可靠性 • 上一篇    下一篇

晶体管厄利电压对功放电路静态电流影响实例分析

邱静君   

  1. 无锡华润矽科微电子有限公司,江苏无锡 214000
  • 收稿日期:2017-06-12 出版日期:2017-10-20 发布日期:2017-10-20
  • 作者简介:邱静君(1963—),女,浙江台州人,1983年毕业于浙江大学无线电系半导体器件专业,本科学历,从事集成电路设计多年,擅长产品结合工艺分析,曾获国家级、省部级科技进步奖多项。

Study of Early Voltage Transistor Effect on Quiescent Current in Power-Amplifier Integrated Circuits

QIU Jingjun   

  1. Wuxi China Resources Semico Co.,Ltd,Wuxi 214000,China
  • Received:2017-06-12 Online:2017-10-20 Published:2017-10-20

摘要: 通过对某款功放电路的静态电流随电源电压增加而快速增大的实例,分析了晶体管厄利电压对静态电流变化的影响。通过对同款电路在不同工艺平台中测试结果的对比,分析了静态电流随电源电压变化过快的现象跟晶体管参数厄利电压的相关性,并分析了浅结工艺用于制造功放电路的缺点。分析结果表明通过优化或改变工艺条件(即增加基区结深),使晶体管厄利电压增大,可以解决该款功放电路静态电流随电源电压增大增速过快的问题。

关键词: 功放电路, 静态电流, 电源电压, 基区结深, 厄利电压

Abstract: Based on the case of a given power-amplifier integrated circuit in which quiescent current in creases dramatically with supply voltage,the effect of Early transistor voltage on quiescent current is analyzed.By comparing the test results of the same circuit in different process plat forms,the relativity between Early voltage and changes of quiescent current and the detriments of using shallow junction process in the manufacture of power-amplified circuits are analyzed.Results show that optimization or change of process that increases the Early transistor voltage will perfectly solves the problem.

Key words: power-amplifying circuits, quiescent current, power supply voltage, base depth, Early voltage

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