中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

导航

电子与封装 ›› 2019, Vol. 19 ›› Issue (10): 20 -25. doi: 10.16257/j.cnki.1681-1070.2019.1006

• 电路设计 • 上一篇    下一篇

应用于抗辐照FPGA的多标准I/O电路设计

王雪萍,曹 靓   

  1. 中科芯集成电路有限公司,江苏 无锡 214072
  • 收稿日期:2019-07-01 出版日期:2019-10-20 发布日期:2020-01-08
  • 作者简介:王雪萍(1991—),女,河南信阳人,硕士,现从事工作领域为IC设计。

Design of a Multi-Standard I/O Circuit Applied in Radiation-Tolerant FPGA

WANG Xueping, CAO Liang   

  1. China Key System & Integrated Circuit Co., Ltd., Wuxi 214072, China
  • Received:2019-07-01 Online:2019-10-20 Published:2020-01-08

摘要: 针对工业控制、航空航天等多种复杂的电磁辐射环境中对大规模FPGA器件及高速数据传输的迫切需求,设计了一种可应用于抗辐照FPGA的多标准I/O电路。该I/O电路中输入/输出寄存器均采用三模冗余(TMR)技术进行了抗辐照加固,能够支持14种电平标准,实现宽电压范围调节。该抗辐照FPGA抗单粒子翻转(SEU)大于37 MeV?cm2/mg。仿真及测试结果表明,该I/O电路满足设计要求。

关键词: TMR, I/O, 抗辐照, FPGA

Abstract: A multi-standard I/O circuit is designed for the radiation-tolerant FPGA to meet the requirements of large-scale FPGA devices and high speed data transmission in industrial control, aerospace and other various complex electromagnetic radiation environment. The input/output registers in the I/O circuit are protected against radiation by triple-module redundancy technology, the I/O circuit can support 14 level standards and achieve wide voltage range regulation. The radiation-tolerant FPGA is immune to single-event upsets (SEU) to LETTH >37 MeV?cm2/mg. The simulation and test results show that the I/O circuit meets the design requirements.

Key words: TMR, I/O, radiation-tolerant, FPGA

中图分类号: