关键词: 电源管理芯片, 导线阻抗, 参考电位点

Abstract: When testing and applying the power management chip, it is often encountered that the power management chip cannot work properly or maintain high performance under heavy current, which leads to the need to spend a lot of time and energy to debug and modify the design of the power supply system. This paper starts with two common types of power level topologies of DC-DC power supply, focuses on the influence of power level current path on the testing and application of power management chip, and gives some practical suggestions.

Key words: power management chip, lead impedance, reference point