面向三维集成的等离子体活化键合研究进展*

doi:10.16257/j.cnki.1681-1070.2023.0064

摘要/Abstract

摘要： 三维集成技术已成为促使半导体芯片步入后摩尔时代的重要支撑。晶圆直接键合技术无需微凸点和底充胶填充工艺，依靠原子间相互作用力即可实现高密度与高强度互连，是三维集成发展的重要研究方向之一。其中等离子体活化作为一种高效的表面处理手段，是晶圆低温键合的关键。针对等离子体活化低温键合技术在半导体芯片同质或异质键合中的研究进展进行了综述，主要介绍了等离子体活化在硅基材料直接键合及金属－介质混合键合中的作用机理和键合效果，进而对该技术的未来发展趋势进行了展望。

关键词: 等离子体, 表面活化, 低温键合, 三维集成

Abstract: Three-dimensional (3D) integration technology has become an important support to promote semiconductor chips into the post Moore era. Direct wafer bonding technology can realize high-density and high-strength interconnection by relying on the interatomic interaction without the need of micro bumps and underfill filling process, which is one of the important research directions in the development of 3D integration. As an efficient surface treatment method, plasma activation is the key to wafer bonding at low temperature. The research progress of plasma activated low temperature bonding technology in homogeneous or heterogeneous bonding of semiconductor chips is reviewed. The mechanism and bonding effect of plasma activated in direct bonding of silicon-based materials and metal-dielectric hybrid bonding are mainly introduced. And the future development trend of this technology is prospected.

Key words: plasma, surface activation, low temperature bonding, three-dimensional integration

中图分类号:

TN305.94

牛帆帆, 杨舒涵, 康秋实, 王晨曦. 面向三维集成的等离子体活化键合研究进展^*[J]. 电子与封装, 2023, 23(3): 030105 .

NIU Fanfan, YANG Shuhan, KANG Qiushi, WANG Chenxi. ResearchProgress in Plasma Activated Bonding for 3D Integration[J]. Electronics & Packaging, 2023, 23(3): 030105 .

参考文献

[1] 徐罕，朱亚军，戴飞虎，等. 晶圆级封装中的垂直互连结构[J]. 电子与封装，2021，21(10)： 100107.
[2] 张洪泽，田野，孟莹，等. 表面活化室温键合技术研究进展[J]. 机械工程学报，2022，58(2)：136-146.
[3] 王晨曦，戚晓芸，方慧，等. 紫外光活化低温键合研究进展[J]. 机械工程学报，2022，58(2)：122-135.
[4] FANG H, WANG C X, ZHOU S C, et al. Enhanced adhesion and anticorrosion of silk fibroin coated biodegradable Mg-Zn-Ca alloy via a two-step plasma activation[J]. Corrosion Science: The Journal on Environmental Degradation of Materials and its Control, 2020, 168(5): 108466.
[5] LASKY J B. Wafer bonding for silicon-on-insulator technologies[J]. Applied Physics Letters, 1986, 48(1): 78-80.
[6] SHIMBO M, FURUKAWA K, FUKUDA K, et al. Silicon-to-silicon direct bonding method[J]. Journal of Applied Physics, 1986, 60(8): 2987-2989.
[7] TONG Q Y, GOSELE U. Semiconductor wafer bonding: science and technology[M]. New York: John Wiley & Sons Inc., 1999.
[8] PLACH T, HINGERL K, TOLLABIMAZRAEHNO S, et al. Mechanisms for room temperature direct wafer bonding[J]. Journal of Applied Physics, 2013, 113(9): 094905.
[9] LI D L, CUI X H, DU M, et al. Effect of combined hydrophilic activation on interface characteristics of Si/Si wafer direct bonding[J]. Processes, 2021, 9(9): 1599.
[10] LI D L, SHANG Z G, WANG S Q, et al. Low temperature Si/Si wafer direct bonding using a plasma activated method[J]. Journal of Zhejiang University SCIENCE C, 2013, 14(4): 244-251.
[11] BYUN K Y, FERAIN L, COLINGE C. Effect of free radical activation for low-temperature Si-Si wafer bonding[J]. Journal of The Electrochemical Society, 2010, 157(1): 109-112.
[12] BYUN K Y, FERAIN I, FLEMING P, et al. Low temperature germanium to silicon direct wafer bonding using free radical exposure[J]. Applied Physics Letters, 2010, 96(10): 102110.
[13] QI X, FANG H, et al. Investigation of plasma activation directions for low-damage direct bonding[J]. ECS Journal of Solid State Science and Technology, 2020, 9(8): 081004.
[14] KANG Q S, WANG C X, NIU F F, et al. Single-crystalline SiC integrated onto Si-based substrates via plasma-activated direct bonding[J]. Ceramics International, 2020, 46(14): 22718-22726.
[15] WANG C X, FANG H, ZHOU S C, et al. Recycled low-temperature direct bonding of Si/glass and glass/glass chips for detachable micro/nanofluidic devices[J]. Journal of Materials Science & Technology, 2020, 11: 156-167.
[16] HOWLADER M R, KAGAMI G, LEE S H, et al. Sequential plasma-activated bonding mechanism of silicon/silicon wafers[J]. Journal of Microelectromechanical Systems: A Joint IEEE and ASME Publication on Microstructures, Microactuators, Microsensors, and Microsystems, 2010, 19(4): 840-848.
[17] TABATA T, SANCHEZ L, LARREY V, et al. SiO2-SiO2 die-to-wafer direct bonding interface weakening[J]. Microelectronics Reliability, 2020, 107(4): 113589.
[18] WANG C X, LIU Y N, LI Y, et al. Mechanisms for room-temperature fluorine containing plasma activated bonding[J]. ECS Journal of Solid State Science and Technology, 2017, 6(7): 373-378.
[19] WANG C X, LIU Y N, SUGA T. A comparative study: Void formation in silicon wafer direct bonding by oxygen plasma activation with and without fluorine[J]. ECS Journal ofSolid State Science and Technology, 2017, 6(1): 7-13.
[20] WANG C X, SUGA T. Investigation of fluorine containing plasma activation for room-temperature bonding of Si-based materials[J]. Microelectronics Reliability, 2012, 52(2): 347-351.
[21] TAN C M, YU W B, WEI J. Comparison of medium-vacuum and plasma-activated low-temperature wafer bonding[J]. Applied Physics Letters, 2006, 88(11): 114102.
[22] CHEN K N, FAN A, REIF R. Microstructure examination of copper wafer bonding[J]. Journal of Electronic Materials, 2001, 30(4): 331-335.
[23] PARK M S, BAEK S J, KIM S D, et al. Argon plasma treatment on Cu surface for Cu bonding in 3D integration and their characteristics[J]. Applied Surface Science: A Journal Devoted to the Properties of Interfaces in Relation to the Synthesis and Behaviour of Materials, 2015, 324(1): 168-173.
[24] CHUA S L, CHAN J M, GOH S C K, et al. Cu–Cu bonding in ambient environment by Ar/N2 plasma surface activation and its characterization[J]. IEEE Transactions on Components, Packaging and Manufacturing Technology, 2019, 9(3): 596-605.
[25] PARK H S, SEO H Y, KIM S E. Anti-oxidant copper layer by remote mode N2 plasma for low temperature copper-copper bonding[J]. Scientific Reports, 2020, 10(1): 21720.
[26] BAKLANOV M R, SHAMIRYAN D G, T?KEI Z S. Characterization of Cu surface cleaning by hydrogen plasma[J]. Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures: Processing, Measurement and Phenomena, 2001, 19(4): 1201-1211.
[27] TAN C S, LIM D F, SINGH S G, et al. Cu–Cu diffusion bonding enhancement at low temperature by surface passivation using self-assembled monolayer of alkane-thiol[J]. Applied Physics Letters, 2009, 95(19): 192108.
[28] GHOSH T, KRUSHNAMURTHY K, PANIGRAHI A K, et al. Facile non thermal plasma based desorption of self assembled monolayers for achieving low temperature and low pressure Cu–Cu thermo-compression bonding[J]. RSC Advances, 2015, 5(125): 103643-103648.
[29] CHOU T C, HUANG S Y, CHEN P J, et al. Electrical and reliability investigation of Cu-to-Cu bonding with silver passivation layer in 3-D integration[J]. IEEE Transactions on Components, Packaging and Manufacturing Technology, 2021, 11(1): 36-42.
[30] HUANG Y P, CHIEN Y S, TZENG R N, et al. Demonstration and electrical performance of Cu–Cu bonding at 150 °C with Pd passivation[J]. IEEE Transactions on Electron Devices, 2015, 62(8): 2587-2592.
[31] LIU D M, CHEN P C, CHEN K N. A novel low-temperature Cu-Cu direct bonding with Cr wetting layer and Au passivation layer[C]. IEEE 70th Electronic Components and Technology Conference (ECTC), Orlando, FL, USA: IEEE, 2020: 1322-1327.
[32] HUANG Y P, CHIEN Y S, TZENG R N, et al. Novel Cu-to-Cu bonding with Ti passivation at 180 ℃ in 3-D integration[J]. IEEE Electron Device Letters, 2013, 34(12): 1551-1553.
[33] GAO G L, MIRKARIMI L, WORKMAN T, et al. Low temperature Cu interconnect with chip to wafer hybrid bonding[C]// 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), Las Vegas, NV, USA: IEEE, 2019: 628-635.
[34] 刘子玉.应用于三维集成的片间互连关键技术研究[D]. 北京：清华大学，2015.
[35] KANG Q S, WANG C X, ZHOU S C, et al. Low-temperature Co-hydroxylated Cu/SiO2 hybrid bonding strategy for a memory-centric chip architecture[J]. ACS Applied Materials Interfaces, 2021, 13(32): 38866-38876.

中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

面向三维集成的等离子体活化键合研究进展^*

ResearchProgress in Plasma Activated Bonding for 3D Integration

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