中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2023, Vol. 23 ›› Issue (3): 030109 . doi: 10.16257/j.cnki.1681-1070.2023.0070

所属专题: 先进三维封装与异质集成

• “先进三维封装与异质集成”专题 • 上一篇    下一篇

高端性能封装技术的某些特点与挑战

马力;项敏;石磊;郑子企   

  1. 通富微电子股份有限公司,江苏南通 226000
  • 收稿日期:2022-10-26 出版日期:2023-03-24 发布日期:2023-03-24
  • 作者简介:马力(1984—),男,江苏昆山人,博士,通富微电子股份有限公司先进封装研发总监,主要研究方向为2.5D/3D Chiplet先进封装技术。

Some Features andChallenges for the High-End Performance Advanced Packaging Technology

MA Li , XIANG Min , SHI Lei ,CHUNG Key   

  1. TongFu Microelectronics Co., Ltd., Nantong 226000, China
  • Received:2022-10-26 Online:2023-03-24 Published:2023-03-24

摘要: 高性能计算、人工智能等应用推动芯片的技术节点不断向前迈进,导致设计、制造的难度和成本问题凸显,针对这一问题,Chiplet技术应运而生。Chiplet技术是将复杂的系统级芯片按IP功能切分成能够复用的小芯片(芯粒),然后,厂商们将执行存储和处理等功能的小芯片以超高密度扇出型封装、2.5D和3D高端性能封装进行重新组装,以实现高性能计算对高带宽、高性能的要求。介绍了上述封装的多样化形式和通信协议,分析了其重要的电连接结构与工艺难点,及其在可靠性方面的一些问题。

关键词: Chiplet, 高端性能封装, 通信协议, 可靠性

Abstract: High performance computing, artificial intelligenceand other applications are driving the technical node of chips forward, making it difficult and costly to design and manufacture, and Chiplet technology was created to address this problem. Chiplet detaches a complex system-on-chip to reusable small dies by IP function. Then, to meet high performance and high bandwidth requirements of high performance computing, manufacturers reassemble memories and processes by the high-end performance packaging, including the ultra-high density fan-out, 2.5D and 3D packaging. Diverse types and communication protocols of the above high-end performance packaging are introduced, and their important electrical connections and process difficulties are analyzed, as well as some reliability issues.

Key words: Chiplet, high-end performance packaging, communication protocol, reliability

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