中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2021, Vol. 21 ›› Issue (10): 100107 . doi: 10.16257/j.cnki.1681-1070.2021.1007

所属专题: 微系统与先进封装技术

• “微系统与先进封装技术”专题 • 上一篇    下一篇

晶圆级封装中的垂直互连结构

徐罕1;朱亚军1;戴飞虎1;高娜燕1;吉勇1;王成迁1,2   

  1. 1. 中国电子科技集团公司第五十八研究所,江苏 无锡 214072;2. 厦门大学电子科学与技术学院,福建 厦门 361005
  • 收稿日期:2020-12-07 出版日期:2021-10-26 发布日期:2021-06-19
  • 作者简介:徐罕(1989—),男,江苏淮安人,本科,工程师,目前主要从事晶圆级先进封装研究相关工作。

The Vertical Interconnection Structures ofWafer Level Package

XU Han1, ZHU Yajun1, DAI Feihu1, GAO Nayan1, JI Yong1, WANG Chengqian1,2   

  1. 1. China ElectronicsTechnology Group Corporation No.58Research Institute, Wuxi 214072, China; 2. School of Electronic Science and Engineering, Xiamen University, Xiamen 361005, China
  • Received:2020-12-07 Online:2021-10-26 Published:2021-06-19

摘要: 随着电子产品需求的不断提升,半导体封装技术的发展已经从2D结构发展到2.5D乃至3D结构,这对包括高密度集成和异质结构封装在内的系统级封装(System in Packaging,SiP)提出了更高的要求。以当下热门的晶圆级封装为切入点,重点阐述并总结目前在晶圆级封装结构中出现的3种垂直互连结构:硅通孔(Through Silicon Via,TSV)、塑封通孔(Through Molding Via,TMV)、玻璃通孔(Through Glass Via,TGV)。这3种垂直互连结构也是业内公认的推进三维集成封装的关键技术。从3种垂直互连结构的发展历史、工艺方法和应用领域等多个方面进行提炼总结,明确垂直互连结构的现状能力及未来挑战,为晶圆级三维集成封装技术开发和探索提供参考。

关键词: 晶圆级封装, 垂直互连, TSV, TMV, TGV

Abstract: Along with the continuous improvement of product applications and market demands for many years,the development of semiconductor packaging technology has developed from 2D to 2.5D and even to 3D integrated structure. It puts forward higher requirements for SiP (system in packaging), including high density integration and heterogeneous structure packaging. Three kinds of vertical interconnection structures in wafer level packaging are mainly expounded and summarized: TSV (through silicon via), TMV (through mold via) and TGV (through glass via). Three structures are also considered as the key technologies to promote 3D integrated SiP packaging in the industry. Three vertical interconnect structures will be summarized from the development history, process methods and application fields, the current capabilities and future challenges of vertical interconnect structures will be clarified, and three structures will provide reference for the technological development and exploration of wafer level integrated packaging.

Key words: waferlevelpackaging, verticalinterconnection, TSV, TMV, TGV

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