中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2024, Vol. 24 ›› Issue (1): 010302 . doi: 10.16257/j.cnki.1681-1070.2024.0009

• 电路与系统 • 上一篇    下一篇

基于Innovus的局部高密度布局规避方法

李应利;王淑芬   

  1. 中国电子科技集团公司第五十八研究所,江苏 无锡 ?214035
  • 收稿日期:2023-07-13 出版日期:2024-01-15 发布日期:2024-01-15
  • 作者简介:李应利(1993—),男,河南焦作人,硕士,工程师,现从事数字集成电路后端设计工作。

Local High-Density Layout Circumvention Method Based on Innovus

LI Yingli, WANG Shufen   

  1. China Electronics Technology Group Corporation No.58 ResearchInstitute, Wuxi 214035,China
  • Received:2023-07-13 Online:2024-01-15 Published:2024-01-15

摘要: 标准单元布局是数字集成电路后端设计的重要环节之一,标准单元密度过高影响着工具的布线和时序的优化。采用UMC 28 nm工艺,基于Innovus的两种方法,解决由于局部高密度标准单元导致保持时间违例、无法通过工具自动化修复的问题,在实现时序优化的同时降低了动态IR Drop。结果表明,在PreCTS阶段设置setPlaceMode-place_global_max_density value对于后续时序优化效果更好,且动态IR Drop降低8.85%。

关键词: 数字后端设计, Innovus, 局部高密度标准单元, 时序优化

Abstract: Standard cell layout is one of the important aspects of digital IC backend design, and high standard cell density affects the tool routing and timing optimization. Using UMC 28 nm process, two methods based on Innovus are used to solve the problem that the hold violation cannot be fixed automatically by the tool due to local high-density standard cells, and the timing optimization is achieved while the dynamic IR Drop is reduced. The results show that setting setPlaceMode-place_global_max_density value in the PreCTS stage is more effective for subsequent timing optimization, and the dynamic IR Drop is reduced by 8.85%.

Key words: digital backend design, Innovus, local high-density standard cells, timing optimization

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