中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2019, Vol. 19 ›› Issue (10): 36 -38. doi: 10.16257/j.cnki.1681-1070.2019.1009

• 电路设计 • 上一篇    下一篇

基于非均匀采样的稀疏信号恢复FPGA实现技术研究

傅建军,刘琛琛,许 伟   

  1. 中科芯集成电路有限公司,江苏 无锡 214072
  • 收稿日期:2019-07-16 出版日期:2019-10-20 发布日期:2020-01-08
  • 作者简介:傅建军(1977—),男,江苏丹阳人,硕士,毕业于西安电子科技大学,IC设计工程师,现从事数模混合IC设计。

Research on FPGA Implementation Technology of Sparse Signal Recovery Based on Non-Uniform Sampling

FU Jianjun, LIU Chenchen, XU Wei   

  1. China Key System & Integrated Circuit Co., Ltd., Wuxi 214072, China
  • Received:2019-07-16 Online:2019-10-20 Published:2020-01-08

摘要: 针对宽频段非均匀采样信号恢复的FPGA实现进行了技术研究。以非均匀采样器作为频域稀疏信号的压缩采样模型,应用快速迭代阈值收缩算法(FISTA)求解基于L1范数最小化的稀疏信号恢复优化问题-基追踪抗量化噪声,提出了对求解过程的近似处理方法,使得硬件实现难度大幅降低,最终给出了基于FISTA的信号恢复算法在FPGA上的实现方法,并编写了Verilog HDL代码在逻辑电路仿真工具上进行了仿真,算法运行时间为6.7 ms。结果表明所设计的恢复电路能够正确运行,且具备良好的实时性能。

关键词: 压缩感知, 快速迭代阈值收缩算法, 基追踪抗量化噪声

Abstract: The FPGA realization of the recovery of non-uniform sampling signals in the wideband electronic reconnaissance is studied. Taking the non-uniform sampler as the compressed sampling model for sparse signals in frequency domain, the fast iterative shrinkage-thresholding algorithm is used to solve the L1 convex optimization problem of basis pursuit de-quantization. An approximate processing method is proposed to reduce the difficulty of hardware implementation. The realization method of signal recovery algorithm based on FISTA on FPGA is given, and relevant Verilog HDL code is compiled and verified on logical simulator. The running time of algorithm on FPGA is 6.7 ms. The results show that the designed recovery circuit is able to run correctly and has good real-time performance.

Key words: compressive sensing, fast iterative shrinkage-thresholding algorithm, basis pursuit de-quantization

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