有限元仿真优化布局解决金金键合局域化问题

doi:10.16257/j.cnki.1681-1070.2024.0016

电子与封装 ›› 2024, Vol. 24 ›› Issue (4): 040202 . doi: 10.16257/j.cnki.1681-1070.2024.0016

有限元仿真优化布局解决金金键合局域化问题

张丹青,韩易,商庆杰,宋洁晶,杨志

中国电子科技集团公司第十三研究所，石家庄? 050051

收稿日期:2023-07-25 出版日期:2024-04-24 发布日期:2024-04-24
作者简介:张丹青（1990—），男，河北河间人，硕士，工程师，主要从事MEMS、晶圆键合等工作。

Finite Element Simulation Optimized Layout Solution to the Localization Problem of Au-Au Bonding

ZHANG Danqing, HAN Yi, SHANG Qingjie, SONG Jiejing, YANG Zhi

China Electronics Technology Group Corporation No.13 Research Institute, Shijiazhuang050051, China

Received:2023-07-25 Online:2024-04-24 Published:2024-04-24

摘要/Abstract

摘要： 晶圆金金键合技术在集成电路封装、微机电系统（MEMS）器件制造、CMOS图像传感器制作及LED制造等行业中被广泛应用。在MEMS环形器的制造过程中，由于金金键合的压力分布不均匀，导致其键合有效区域仅限于键合区域的边缘位置，即存在键合局域化问题，因此器件的整体可靠性较差。结合有限元力学仿真和金金键合实验，优化了键合点的分布，确保键合压力分布更加均匀。将有效键合面积从20%提升到77%，单颗芯片的平均剪切力从41.5 N增大到80.3 N，有效提升了MEMS环形器的可靠性。

关键词: 封装技术, 金金键合, MEMS环形器, 有限元仿真

Abstract: Wafer level Au-Au bonding technology is widely used in industries such as integrated circuit packaging, micro-electro-mechanical system (MEMS) device fabrication, CMOS image sensor fabrication and LED manufacturing. In the manufacturing process of MEMS circulator, due to the uneven pressure distribution of Au-Au bonding, the effective bonding area is limited to the edge position of the bonding area, which leads to the problem of bonding localization. Therefore, the overall reliability of the device is poor. Combining finite element simulation and Au-Au bonding tests, the distribution of bonding points is optimized to ensure a more uniform bonding pressure distribution. The effective bonding area is increased from 20% to 77%, and the average shear force of a single chip is increased from 41.5 N to 80.3 N, which effectively improves the reliability of the MEMS circulator.

Key words: packaging technology, Au-Au bonding, MEMS circulator, finite element simulation

中图分类号:

TN305.94

张丹青,韩易,商庆杰,宋洁晶,杨志. 有限元仿真优化布局解决金金键合局域化问题[J]. 电子与封装, 2024, 24(4): 040202 .

ZHANG Danqing, HAN Yi, SHANG Qingjie, SONG Jiejing, YANG Zhi. Finite Element Simulation Optimized Layout Solution to the Localization Problem of Au-Au Bonding[J]. Electronics & Packaging, 2024, 24(4): 040202 .

参考文献

[1] SHEN W W, CHEN K N. Three-dimensional integrated circuit (3D IC) key technology: Through-silicon via (TSV) [J]. Nanoscale Research Letters, 2017, 12(1): 56.
[2] 张威, 张大成, 王阳元. MEMS概况及发展趋势[J]. 微纳电子技术, 2002, 39(1): 22-27.
[3] HOU S Y, CHEN W C, HU C, et al. Wafer-level integration of an advanced logic-memory system through the second-generation CoWoS technology[J]. IEEE Transactions on Electron Devices, 2017, 64(10): 4071-4077.
[4] CHANG C L, CHUANG Y C, LIU C Y. Ag∕Au diffusion wafer bonding for thin-GaN LED fabrication[J]. Electrochemical and Solid-State Letters, 2007, 10(11): H344-H346.
[5] DRAGOI V, FILBERT A, ZHU S, et al. CMOS wafer bonding for back-side illuminated image sensors fabrication[C]// 2010 11th International Conference on Electronic Packaging Technology & High Density Packaging, Xi’an, 2010: 27-30.
[6] 戴锦文. 晶圆级封装技术的发展[J]. 中国集成电路, 2016, 25(S1): 22-24, 79.
[7] 冯伟, 雷程, 梁庭, 等. 低温Au-Au键合工艺的研究[J]. 电子测量技术, 2020, 43(21): 25-28.
[8] 王晨曦, 王特, 许继开, 等. 晶圆直接键合及室温键合技术研究进展[J]. 精密成形工程, 2018, 10(1): 67-73.
[9] DROST A, KLINK G, SCHERBAUM S, et al. Simultaneous fabrication of dielectric and electric joints by wafer bonding[C]// Proceedings Volume 3514, Micromachined Devices and Components IV, Santa Clara, CA, USA, 1998, 3514: 62-71.
[10] TSAU C H, SPERING S M, SCHMIDT M A. Fabrication of wafer-level thermocompression bonds[J]. Journal of Microelectromechanical Systems: A Joint IEEE and ASME Publication on Microstructures, Microactuators, Microsensors, and Microsystems, 2002, 11(6): 641-647.
[11] 李黎明. ANSYS有限元分析实用教程[M]. 北京: 清华大学出版社, 2005.
[12] 李一博, 郭霞, 关宝路, 等. 基于Au/Au直接键合的高亮度ODRLED[J]. 固体电子学研究与进展, 2009, 29(3): 399-402.
[13] 李倩, 汪蔚, 杨拥军, 等. 硅腔体MEMS环行器的设计与制作[J]. 微纳电子技术, 2017, 54(6): 408-412, 430.

中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

有限元仿真优化布局解决金金键合局域化问题

Finite Element Simulation Optimized Layout Solution to the Localization Problem of Au-Au Bonding

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