中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2017, Vol. 17 ›› Issue (3): 13 -18. doi: 10.16257/j.cnki.1681-1070.2017.0030

• 封装、组装与测试 • 上一篇    下一篇

三维封装中的并行键合线信号仿真分析

王祺翔1,2,3,曹立强1,2,3,周云燕1,3   

  1. 1.华进半导体封装先导研发中心,江苏 无锡 214135;2.中国科学院大学,北京 100049;3.中国科学院微电子研究所,北京 100029
  • 收稿日期:2016-11-21 出版日期:2017-03-20 发布日期:2017-03-20
  • 作者简介:王祺翔(1992—),男,朝鲜族,吉林长春人,硕士,主要研究方向为系统级封装设计与电学仿真。

The Simulation Analysis of Parallel Bonding Wire Signal in a 3D System-in-Package

WANG Qixiang1,2,3, CAO Liqiang1,2,3, ZHOU Yunyan1,3   

  1. 1.National Center for Advanced Packaging(NCAPChina),Wuxi 214135,China; 2.University of Chinese Academy of Sciences,Beijing 100049,China; 3.Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China
  • Received:2016-11-21 Online:2017-03-20 Published:2017-03-20

摘要: 当今便携式设备的速率可达数吉比特每秒,但是其通道的频宽限制其性能。在所有芯片与基板的传输结构中键合线是最常用的,但却渐渐成为了带宽主要的限制。基于一款高密度布线系统级封装的研发项目,使用全波电磁场仿真工具进行建模分析,研究了不同参数对键合传输线DDR单端信号与差分信号传输质量的影响。最终通过键合线设计的优化,仿真结果通过了眼图的验证。

关键词: 键合线, 系统级封装, DDR, 单端信号, 差分信号

Abstract: Today’s portable electrical devices can run at gigabits per second (Gbps), but the bandwidth of the channel limits its performance. Among all the transmission structures between the chips and substrates, the bonding wire is the most commonly used, but it is becoming a major bandwidth constraint. This paper is based on the research and development project of high-density wiring System-in-Package. Modeling analysis is conducted with the full?wave electromagnetic field simulation tools to research the influences of different parameters on DDR single-ended and differential signal transmission quality of the bonding wire transmission line. Finally, through the optimization of bonding wire design, the simulation results were verified by eye diagram.

Key words: bonding wire, System-in-Package, DDR, single-ended signal, differential signal

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