中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2022, Vol. 22 ›› Issue (3): 030201 . doi: 10.16257/j.cnki.1681-1070.2022.0312

• 封装、组装与测试 • 上一篇    下一篇

溅射覆铜陶瓷基板表面研磨技术研究*

王哲1;刘松坡1;吕锐1;陈红胜1;陈明祥2   

  1. 1. 武汉利之达科技股份有限公司,武汉 430206;2. 华中科技大学机械学院,武汉 430074
  • 收稿日期:2021-08-12 出版日期:2022-03-24 发布日期:2021-10-01
  • 作者简介:王哲(1995—),男,湖北荆州人,硕士,工程师,主要从事电子封装技术研究。

Research on the Surface Grinding Process of Direct Plated Copper Ceramic Substrate

WANG Zhe1, LIU Songpo1, LYU Rui1, CHEN Hongsheng1, CHEN Mingxiang2   

  1. 1. Wuhan LEDstar Technology Co., Ltd.,Wuhan 430206, China;2. Huazhong University of Science and Technology, Wuhan 430074, China
  • Received:2021-08-12 Online:2022-03-24 Published:2021-10-01

摘要: 电镀陶瓷基板(Direct Plate Copper, DPC)具有导热/耐热性好、图形精度高、可垂直互连等技术优势,广泛应用于功率半导体器件封装。在DPC陶瓷基板制备过程中,电镀铜层厚度及其均匀性、表面粗糙度等对基板性能及器件封装质量影响极大。对比分析了几种研磨技术对DPC陶瓷基板性能的影响,实验结果表明,砂带研磨效率高,但铜层表面粗糙度高,只适用于DPC陶瓷基板表面粗磨加工;数控研磨与陶瓷刷磨加工的铜层厚度均匀性好,表面粗糙度低,满足光电器件倒装共晶封装需求(粗糙度小于0.3 μm,厚度极差小于30 μm);对于质量要求更高(如表面粗糙度小于0.1 μm,铜厚极差小于10 μm)的DPC陶瓷基板,则必须采用粗磨+化学机械抛光(Chemical-Mechanical Polishing, CMP)的组合研磨工艺。

关键词: DPC陶瓷基板, 电镀铜层, 表面研磨, 工艺优化, 封装

Abstract: Direct plate copper (DPC) ceramic substrate is widely used for thermal management of power semiconductor devices because of its advantages such as high thermal conductivity/heat resistance, high pattern accuracy and vertical interconnection ability. In the process of producing DPC ceramic substrate, the thickness of plating copper layer, its uniformity and surface roughness have great influence on the quality of substrate and packaging performance of devices. The effects of several grinding techniques on the properties of DPC ceramic substrate are compared and analyzed. The experimental results show that the abrasive belt grinding has high grinding efficiency, but the surface roughness of its copper layer is high, which is only suitable for the coarse grinding process of DPC substrate. The thickness of copper layer processed by CNC grinding and ceramic brush grinding is good and the surface roughness is low, which meets the requirements of flip-chip eutectic bonding of photoelectric devices (usually the roughness is less than 0.3 μm and the thickness range is less than 30 μm). For DPC ceramic substrates with higher surface roughness requirements (less than 0.1 μm), it is necessary to combine grinding process included coarse grinding and chemical mechanical polishing (CMP).

Key words: DPCceramicsubstrate, platingcopper, surfacegrinding, processoptimization, packaging

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