中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

导航

电子与封装 ›› 2017, Vol. 17 ›› Issue (10): 36 -41. doi: 10.16257/j.cnki.1681-1070.2017.0123

• 微电子制造与可靠性 • 上一篇    下一篇

埋氧离子注入对P型部分耗尽SOI电学与低频噪声的影响

陈海波1,刘 远2,3,吴建伟1,恩云飞2   

  1. 1.中国电子科技集团公司第五十八研究所,江苏无锡 214072;2.工业和信息化部电子第五研究所电子元器件可靠性物理及其应用技术国家重点实验室,广州 510610;3.华南理工大学微电子学院,广州 510640
  • 收稿日期:2017-05-30 出版日期:2017-10-20 发布日期:2017-10-20
  • 作者简介:陈海波(1986—),男,河南商丘人,硕士,毕业于西北工业大学材料学专业,主要从事半导体集成电路工艺和器件可靠性研究。

Dependence of Ion Implantation on the Electrical Characteristics and Low Frequency Noise in the P-Type PD-SOI Devices

CHEN Haibo1,LIU Yuan2,3,WU Jianwei1,EN Yunfei2   

  1. 1.China Electronics Technology Group Corporation No.58 Research Institute,Wuxi214072,China;2.Science and Technology on Reliability Physics and Application of Electronic Component Laboratory,CEPREI,Guangzhou 510610,China;3.School of Microelectronics,South China University of Technology,Guangzhou 510640,China
  • Received:2017-05-30 Online:2017-10-20 Published:2017-10-20

摘要: 针对抗辐照SOIPMOS器件的直流特性与低频噪声特性展开试验与理论研究,分析离子注入工艺对PMOS器件电学性能的影响,并预测其稳定性的变化。首先,对离子注入前后PMOS器件的阈值电压、迁移率和亚阈摆幅进行提取。测量结果表明:埋氧化层离子注入后,器件背栅阈值电压由-43.39 V变为-39.2 V,空穴有效迁移率由127.37 cm2/Vs降低为80.45 cm2/Vs,亚阈摆幅由1.35 V/dec增长为1.69 V/dec;结合背栅阈值电压与亚阈摆幅的变化,提取得到埋氧化层内电子陷阱与背栅界面态数量的变化。随后,分析器件沟道电流噪声功率谱密度随频率、沟道电流的变化,提取γ因子与平带电压噪声功率谱密度,由此计算得到背栅界面附近的缺陷态密度。基于电荷隧穿机制,提取离子注入前后埋氧化层内陷阱态随空间分布的变化。最后,基于迁移率随机涨落机制,提取得到离子注入前后PMOS器件的平均霍格因子由6.19×10-5增长为2.07×10-2,这表明离子注入后器件背栅界面本征电性能与应力稳定性将变差。

关键词: 绝缘体上硅, 部分耗尽, 低频噪声, 离子注入

Abstract: Electrical characteristics and low frequency noise of radiation harden partially depleted siliconon-insulator(PD-SOI)p-channel devices are discussed in the paper.The dependence of ion implantation on the electrical performance in the PMOS is studied.Firstly,threshold voltage,hole field effect mobility and sub-threshold swing are extracted.As ion implantation induces electron traps in the buried oxide and back interface states,back gate threshold voltage increases from-43.39 V to-39.2 V and hole field effect mobility decreases from 127.37 cm2/Vs to 80.45 cm2/Vs,while sub-threshold swing increases from 1.35 V/dec to 1.69 V/dec.Based on the variation of back gate threshold voltage and sub-threshold swing,the concentration ofelectron traps in the buried oxide and back interface states are estimated.Subsequently,low frequency noise characteristics are measured.The value of γ and flat-band voltage noise powerspectral densities in the PD-SOI devices with and without ion implantation are extracted,thus the average trap density in the buried oxide are calculated.Based on charge tunneling mechanism,the spatial distribution of electron traps in the buried oxide is extracted.At last,based on mobility fluctuation mechanism,the average Hooge's parameters are extracted which increase from 6.19×10-5to 2.07×10-2,indicating that the intrinsic electronic performances and stress inst abilities are degenerated after ion implantation.

Key words: Silicon on insulator, partially depleted, low frequency noise, ion implantation

中图分类号: