关键词: TIADC, 并行采样, 高速、高带宽

Abstract: The signal acquisition system based on domestic field programmable gate array (FPGA) and time interleaved analog to digital converter (TIADC) is studied. The hardware design problems in the application of TIADC are analyzed. Influences of noise, jitter, spectrum leakage and other factors on the performance of signal acquisition system are studied. The calibration and alignment of TIADC channel mismatch errors are completed based on least square method. Dynamic performances of the designed signal acquisition system are tested. The results show that the sampling rate of the designed signal acquisition system reaches 10 GSa/s, and the real-time sampling bandwidth reaches 4 GHz.

Key words: TIADC, parallel sampling, high speed and high bandwidth