关键词: Flash型FPGA, 负压电荷泵, 三阱工艺

Abstract: It is necessary to provide different positive and negative high voltage biases for Flash cells during operations such as programming, erasing, and read-back checking of Flash FPGA. A negative voltage charge pump for Flash FPGA is proposed, which adopts triple-well Flash process to eliminate the influence of substrate bias and substrate leakage. The main body of the charge pump adopts a double-branch parallel structure with 6 stages. Different input reference voltages are provided by the reference voltage generation circuit, and combined with the charge pump control system, the output voltage of the charge pump can be freely adjusted to meet the negative voltage requirements for Flash FPGA programming and erasing. The charge pump is designed and taped out base on 0.13 μm Flash process. Under a 200 pF load capacitor, the measured setting time of the -5.5 V output is only 8 μs with an output ripple of 72 mV, while the -17.5 V output has a setting time of 30 μs and an output ripple of only 56 mV, meeting the operational requirements of Flash FPGA.

Key words: Flash FPGA, negative voltage charge pump, triple-well process