中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2024, Vol. 24 ›› Issue (5): 050301 . doi: 10.16257/j.cnki.1681-1070.2024.0049

• 电路与系统 • 上一篇    下一篇

基于泰勒级数近似的浮点开方运算器的设计

谌民迪1,万江华1,2   

  1. 1. 湘潭大学物理与光电工程学院,湖南 湘潭?411100;2. 湖南毂梁微电子有限公司,长沙?410000
  • 收稿日期:2023-11-12 出版日期:2024-05-27 发布日期:2024-05-27
  • 作者简介:谌民迪(1997—),男,湖南益阳人,硕士研究生,研究方向为数字集成电路设计。

Design of Floating-Point Square Root Operator Based on Taylor Series Approximation

SHEN Mindi1, WAN Jianghua1,2   

  1. 1. School ofPhysics and Optoelectronics, Xiangtan University, Xiangtan 411100, China; 2. Hunan Great-LeoMicroelectronics Co., Ltd., Changsha 410000, China
  • Received:2023-11-12 Online:2024-05-27 Published:2024-05-27

摘要: 基于泰勒级数展开式对浮点开方运算进行优化,设计了一个符合IEEE-754标准的精确浮点开方运算器。为了平衡开方运算器的整体性能,采用泰勒级数的二次展开式。为了解决算法中存在的不能进行精确舍入的问题,引入了一种校准方法,通过对初始近似值进行校准,获得了理想的误差范围。为了提高数据吞吐率和工作频率,对开方运算器shi用了5级流水线划分。仿真和综合结果表明,浮点开方运算器的误差小于0.5 ulp,关键路径延时为2.23 ns,面积为53478.240 μm2,功耗为12.52 mW。

关键词: 开方运算器, 误差分析, 精确舍入, 流水线

Abstract: Based on the Taylor series expansions, optimization is performed for the floating-point square root operation, resulting in a design of a precise floating-point square root operator compliant with the IEEE-754 standard. To balance the overall performance of the square root operator, a quadratic expansion of the Taylor series is employed. In order to address the issue of not being able to perform precise rounding in the algorithm, a calibration method is introduced, calibrating the initial approximation to achieve an ideal error range. To improve data throughput rate and operating frequency, a 5-stage pipeline division is implemented for the square root operator. Simulation and synthesis results show that the error of the floating-point square root operator is less than 0.5 ulp, with a critical path delay of 2.23 ns, an area of 53478.240 μm2, and a power consumption of 12.52 mW.

Key words: square root operator, error analysis, precise rounding, pipeline

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