中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2020, Vol. 20 ›› Issue (3): 030307 . doi: 10.16257/j.cnki.1681-1070.2020.0309

• 电路设计 • 上一篇    下一篇

一款采用超前相位补偿技术的低压差线性稳压器

曹正州,张艳飞,孙佩   

  1. 中科芯集成电路有限公司, 江苏 无锡  214072
  • 发布日期:2020-03-26
  • 作者简介:曹正州(1982—),男,江苏盐城 人,高级工程师,苏州大学微电子学专 业毕业,现从事集成电路设计工作。

Low-Dropout Regulator with Phase-Lead Compensation

CAO Zhengzhou, ZHANG Yanfei, SUN Pei   

  1. China Key System & Integrated Circuit Co., Ltd.,Wuxi 214072,China
  • Published:2020-03-26

摘要: 设计了一种具有高稳定性、能够驱动较大负载电流的低压差线性稳压器(LDO)电路,输 入电压为3.0~6.0 V,输出电压为2.8 V。采用超前相位补偿技术,产生一组零极点对,零点补偿前面 环路中的极点,使得LDO电路具有稳定的环路结构,得到稳定的输出电压。基于CSMC 0.25 μm EN BCDMOS工艺完成电路和版图的设计。电路仿真结果表明电路的负载调整率为0.03%/A,线性调整 率为0.13%/V,最大驱动的负载电流为10 mA。在不同负载条件下,LDO环路的最差相位裕度能够达 到64.1°。

关键词: 超前相位补偿, 负载调整率, 环路稳定性

Abstract: A low-dropout regulator (LDO) with high stability, which can drive high current load is designed. The input voltage is 3.0-6.0 V, and the output voltage is 2.8 V. Using phase-lead compensation technology, a pair zero-pole is produced, and the zero can compensates the pole produced by the loop circuit, thus the lowdropout regulator has a stable topology and a stable output voltage. Based on CSMC 0.25 μm technology, this design completes the schematic and layout. The simulation results illustrate that the load regulation is 0.03%/A, the line regulation is 0.13%/V, and the biggest output load current is 10 mA. The worst phase margin of this LDO loop can reach 64.1° at different current load condition.

Key words: phase-lead compensation, load regulation, loop gain stability

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