中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2020, Vol. 20 ›› Issue (4): 040303 . doi: 10.16257/j.cnki.1681-1070.2020.0409

• 电路设计 • 上一篇    下一篇

基于FMC标准的万兆以太网卡

周云松,冉万宁   

  1. 中科芯集成电路有限公司,江苏 无锡 214072
  • 发布日期:2020-04-23
  • 作者简介:周云松(1990—),男,四川眉山人,本科,助理工程师,从事FPGA系统设计与应用方向究。

10 Gbit Ethernet Card Based on the FMC Standard

ZHOU Yunsong, RAN Wanning   

  1. China key System Integrated Circuit Co., Ltd., Wuxi 214073, China
  • Published:2020-04-23

摘要: 结合 FMC 标准与 IEEE 802.3ae 协议标准,设计了一种基于 FPGA 夹层卡 (FPGA MezzanineCard, FMC)标准的万兆以太网卡,满足现代工业大数据量传输应用的要求。FMC 标准接口可实现多通道高速接口,解决应用母板与网卡之间的数据传输瓶颈。使用 Verilog 硬件描述语言设计了地址解析协议(Address Resolution Protocol, ARP)与用户数据报协议 (User Datagram Protocol, UDP) 的硬件协议栈,实现开放式系统 (Open System Interconnect, OSI) 模型的传输层;Xilinx 10 G Ethernetsubsystem IP 与小型化可热插拔 (Small Form-factor Pluggable,SFP) 光接口实现 OSI 模型的网络层、数据链路层、物理层。通过 FMC 母板、万兆以太网卡、PC 上位机组建的网络成功测试了万兆以太网通信。

关键词: FMC, UDP, ARP, 万兆以太网

Abstract: Combined with FMC standard and IEEE 802.3ae protocol standard, the 10 Gbit ethernet card based on FMC standard was designed to meet the requirements of large data transmission application in modern industry. FMC standard interface can realize multi-channel high-speed interface and solve the bottleneck of data transmission between application motherboard and network card. The ARP/UDP hardware stack is designed using Verilog hardware description language to realize the transport layer of OSI model, XILINX 10G ethernet subsystem IP and SFP interface implementation network layer, data link layer and physical layer of OSI model. Through the FMC motherboard, 10 Gbit Ethernet card, PC host set up the network successfully tested 10Gbit Ethernet communication.

Key words: FMC, UDP, ARP, 10 Gbit ethernet

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