关键词: 中断响应, 中断处理, 中断嵌套, 中断返回, 循环缓冲中断

Abstract:  In this paper, an efficient and secure interrupt processing system is designed based on a very long instruction word (VLIW) structure high-performance digital signal processor (DSP), which supports 12 levels of maskable interrupts, NMI interrupt processing and hardware and software interrupt nesting. Aiming at the destruction of program flow by loop buffer interrupts, a special interrupt response and processing mechanism is designed to ensure that in the case of high-frequency interrupts, the data processing in the loop buffer is not affected by interrupts, thus avoiding data loss or program crash. The interrupt processing flow is optimised for the characteristics of the VLIW structure, and the interrupt response delay is reduced. Simulation results show that the interrupt response time of this design is 25% shorter than that of traditional methods, and it ensures the data integrity and execution security of complex programs during interrupt processing.

Key words: interrupt response, interrupt processing, interrupt nesting, interrupt return, loop buffer interrupt