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一种流水线架构的2D-FFT加速引擎设计

王培富1,李振涛1,2   

  1. 1.长沙理工大学物理与电子科学学院,长沙  410114;2.湖南毂梁微电子有限公司,长沙  410003
  • 收稿日期:2025-08-03 修回日期:2025-08-25 出版日期:2025-08-28 发布日期:2025-08-28
  • 通讯作者: 李振涛

Design of a 2D-FFT Acceleration Engine with Pipelined Architecture

王培富1,李振涛1,2   

  1. 1. School of Physics and Electronic Science, Changsha University of Science and Technology, Changsha, 410114 China; 2. Hunan Guliang Microelectronics Co., Ltd., Changsha 410003 China
  • Received:2025-08-03 Revised:2025-08-25 Online:2025-08-28 Published:2025-08-28

摘要: 针对毫米波雷达信号处理中距离维和速度维快速进行小点数二维快速傅里叶变换(2D-FFT)的需求,本文设计了一种流水线架构的2D-FFT加速引擎,该引擎采用单路径延迟反馈流水线结构,并在每级前引入数据选通模块,有效支持可配置的点数规模(m×n≤2048)。经研究表明:该设计实现了2D-FFT点数的灵活配置。其所有2D-FFT运算结果,绝对误差小于2.5,相对误差低于0.5%,精度满足使用需求;相对于传统2D-FFT运算,提高了计算效率,对毫米波雷达芯片的实时信号处理具有实用价值。

关键词: 2D-FFT, 流水线, 单路径延迟反馈, 可配置点数

Abstract: Aiming at the demand for fast two-dimensional fast Fourier transform (2D-FFT) with small number of points in the range and velocity dimension in millimeter-wave radar signal processing, this paper designs a 2D-FFT acceleration engine with pipeline architecture, which adopts a single-path delayed-feedback pipeline structure and introduces a data pick-and-pass module before each stage to efficiently support a configurable number of point sizes (m×n<=2048).It is shown that the design realizes the flexible configuration of 2D-FFT points. The absolute error of all 2D-FFT operation results is less than 2.5, and the relative error is less than 0.5%. The accuracy meets the usage requirements. Compared with the traditional 2D-FFT operation, it improves the computational efficiency, and has practical value for the real-time signal processing of millimeter-wave radar chips.

Key words: 2D-FFT, Pipeline, Single-Path Delay Feedback, Configurable point size