关键词: 高压降压, 低静态电流, 同步外部频率, 高效率

Abstract: With the increasing performance demands for automotive electronic systems, automotive high-voltage buck chips require lower quiescent current. Simultaneously, to reduce electromagnetic interference (EMI) and ensure system coordination, the switching frequency of automotive high-voltage buck chips needs to be synchronized with an external clock. This paper presents a design methodology for an automotive high-voltage buck chip featuring ultra-low quiescent current and external clock synchronization capability. In order to reduce the number of external components, an internal frequency compensation method is adopted. Meanwhile, to save the chip area, a capacitor multiplication circuit is used. By employing a proprietary light-load mode, the chip's quiescent current is significantly reduced. A phase-locked loop (PLL) has been designed to synchronize an external clock within the range of 200 kHz to 2.2 MHz. Finally, a buck chip was implemented with a 0.18 μm BCD process, featuring an input voltage range of 3.6-36 V, an output voltage range of 1-12 V, and a maximum output current of 3A. Post-silicon test results show that the chip exhibits a typical quiescent current of only 25μA under no-load conditions, meeting the low-power and high-performance requirements for automotive high-voltage buck chips.

Key words: high voltage step-down, low quiescent current, synchronous external frequency, high efficiency