关键词: ASI链路异常, SiP失效, 延迟链, 时序余量不足

Abstract: The system in package (SiP) technology significantly reduces the size, weight, and power consumption of systems by integrating multiple functional modules, and is widely used in fields such as aviation, aerospace, precision guidance, and radar detection. However, the non-testability of internal interconnection signals in SiP makes it difficult to diagnosis and locate faults, especially failure analysis in complex environments becomes extremely challenging. SiP fault diagnosis typically requires external flying leads to inject excitation signals and monitor signals, or desoldering the SiP from the system for testing and analyzing with professional equipment. These approaches often cause irreversible damage to the fault site, and may even lead to the disappearance of fault phenomena. Focusing on the probabilistic failure of a digital SiP during environmental testing, this paper proposes a delay chain scanning method, which successfully reproduces and locates the asynchronous serial interface (ASI) communication fault without damaging the fault site. The method utilizes internal resources of programmable devices to construct timing scan vectors with a precision of 76 ps. Its key advantage lies in that excitation generation and result observation are completed internally, without additional instruments. This method solves the challenges in digital SiP fault analysis and provides a valuable reference for similar issues. Using this method, the ASI communication fault is accurately identified as insufficient timing margin between the reset and clock signals in the serial-to-parallel unit. The ASI communication fault is effectively resolved by inserting a 1.52 ns logic delay into the reset signal.

Key words:

 ASI link error, SiP failure, delay chain, insufficient timing margin