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中国电子学会电子制造与封装技术分会会刊

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• 电路与系统 •    下一篇

基于8051核的FLASH读取控制电路的设计

黄坚,陈士金   

  1. 无锡中微爱芯电子有限公司,江苏 无锡  214072
  • 收稿日期:2025-09-25 修回日期:2025-11-19 出版日期:2025-12-05 发布日期:2025-12-05
  • 通讯作者: 陈士金

Design of FLASH Read Control Circuit Based on 8051 Core

HUANG Jian, CHEN Shijin   

  1. Wuxi I-CORE Electronics Co., Ltd., Wuxi 214072, China
  • Received:2025-09-25 Revised:2025-11-19 Online:2025-12-05 Published:2025-12-05

摘要: FLASH控制电路是MCU系统中不可或缺的一部分,对于FLASH读取控制电路,其中地址锁存信号AE的设计极其关键,首先要满足FLASH的读取建立时间;其次是FLASH读取的时刻。基于以上两点,常用的方式是基于地址变化,即用地址变化产生的脉冲信号作为FLASH读取的地址锁存信号,但对于8051 CPU跳转指令来说,会出现无效读取的情况,因此本文在地址变化的基础上,增加跳转指令控制逻辑,消除因跳转指令而导致的FLASH无效读取,从而降低了FLASH的读取功耗。

关键词: FLASH读取控制, 跳转指令, 低功耗, 8051 MCU

Abstract: The FLASH control circuit is an indispensable part of MCU system. For the FLASH control circuit, the design and key aspects of the address latch signal (AE) are crucial. Firstly, it must meet the read setup time of the FLASH. Secondly, it must determine when to read the FLASH. Based on these two points, a common approach is to use address changes as the address latch signal for FLASH reading. However, for 8051CPU jump instructions, this can lead to invalid reads. Therefore, this invention adds jump instruction control logic to the address change process, eliminating invalid reads caused by jump instructions, thereby reducing the power consumption of FLASH reads.

Key words: FLASH read control,  jump instruction, low power consumption, 8051 MCU