关键词:

前馈纹波消除技术, 高电源抑制, 无片外电容低压差线性稳压器, 带隙基准, 求和放大器

Abstract: In order to meet the requirements for power supply noise suppression of components such as phase-locked loops (PLL), voltage-controlled oscillators (VCO), and low-noise amplifiers (LNA), a ultra-wideband low-dropout linear regulator (LDO) without external capacitors was designed based on feedforward ripple cancellation technology. A bandgap reference circuit is used to generate the reference voltage; the error amplifier employs a cross-coupled symmetrical operational amplifier architecture, and a novel power ripple coupling circuit is designed, which delivers the ripple to the gate of power transistor via a summing operational amplifier, using a super source follower as the buffer to drive the gate of the power transistor. The circuit is designed based on the SMIC 55 nm process and requires only 4.02 pF capacitance for frequency compensation, achieving an operating voltage range of 1.7 V–2.4 V, an output voltage of 1.5 V, and a maximum load current of 50 mA. Simulation results show that under full load, a power supply rejection greater than 47 dB can be achieved at 1 MHz. Compared with not using the feedforward ripple technique, an improvement of up to 25 dB can be obtained at 1 MHz. The unity-gain bandwidth is 150 MHz, and when the load current switches from 1 mA to 50 mA within 5 μs, the voltage overshoot and undershoot are 2.5 mV and 1.5 mV, respectively.

Key words: FFRC technique, high PSR, capless LDO, bandgap, summing amplifier