一种多比特量化的高精度Sigma-Delta DAC设计

doi:10.16257/j.cnki.1681-1070.2026.0098

电子与封装

• 电路与系统 • 下一篇

一种多比特量化的高精度Sigma-Delta DAC设计

谭琦扬¹，张瑛²，杜建新¹，裴春泽¹

1. 南京邮电大学电子与光学工程学院、柔性电子（未来技术）学院，南京 210023；2. 南京邮电大学集成电路科学与工程学院（产教融合学院），南京 210023

收稿日期:2025-11-17 修回日期:2026-01-29 出版日期:2026-03-17 发布日期:2026-03-17
通讯作者: 杜建新
基金资助:
江苏省高校自然科学研究面上项目（16KJB510033）

Design of High- precision Sigma-Delta DAC with Multi-Bit Quantization

TAN Qiyang¹, ZHANG Ying², DU Jianxin¹, PEI Chunze¹

1. College of Electronic and Optical Engineering & College of Flexible Electronics (Future Technology), Nanjing University of Posts and Telecommunications, Nanjing 210023, China; 2. School of Integrated Circuit Science and Engineering (Industry-Education Integration School), Nanjing University of Posts and Telecommunications, Nanjing 210023, China

Received:2025-11-17 Revised:2026-01-29 Online:2026-03-17 Published:2026-03-17

摘要/Abstract

摘要： 设计了一种多比特量化的高精度Sigma-Delta DAC。采用3阶4位量化的级联谐振分布式反馈结构(CRFB)调制器，有效减小模拟电路的设计难度，提高系统性能；同时采用数据加权平均算法(DWA)电路对电容失配噪声整形以提高整体性能；并且通过改进开关电容DAC的电路结构，优化传递函数，从而降低对运算放大器摆率、带宽的要求。整体电路采用0.15 μm BCD工艺实现，在采样率为10.24 MHz时，后仿真的输出信号噪声失真比(SNDR)为98.2 dB，总谐波失真(THD)为-102.3 dB，有较好的动态特性。

关键词: 开关电容DAC, 级联谐振分布式反馈, 数据加权平均算法

Abstract: A high-precision Sigma-Delta DAC with multi-bit quantization has been designed. A 3rd-order 4-bit quantization Cascaded Resonant Distributed Feedback (CRFB) modulator is employed to effectively reduce analog circuit design complexity and enhance system performance. Concurrently, a data weighted averaging (DWA) circuit is utilized to shape capacitance mismatch noise, thereby improving overall performance. Furthermore, by refining the circuit structure of the switched-capacitor DAC and optimizing the transfer function, the requirements for the operational amplifier slew rate and bandwidth are reduced. The entire circuit is implemented using 0.15 μm BCD process. At a sampling rate of 10.24 MHz, the post-simulation output signal noise distortion ratio (SNDR) is 98.2 dB, and the total harmonic distortion (THD) is -102.3 dB, demonstrating excellent dynamic performance.

Key words:

switched-capacitor DAC, cascaded resonant distributed feedback, data weighted averaging

谭琦扬1, 张瑛2, 杜建新1, 裴春泽1. 一种多比特量化的高精度Sigma-Delta DAC设计[J]. 电子与封装, doi: 10.16257/j.cnki.1681-1070.2026.0098.

TAN Qiyang1, ZHANG Ying2, DU Jianxin1, PEI Chunze1. Design of High- precision Sigma-Delta DAC with Multi-Bit Quantization[J]. Electronics & Packaging, doi: 10.16257/j.cnki.1681-1070.2026.0098.

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一种多比特量化的高精度Sigma-Delta DAC设计

Design of High- precision Sigma-Delta DAC with Multi-Bit Quantization

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