中国电子学会电子制造与封装技术分会会刊

中国半导体行业协会封测分会会刊

无锡市集成电路学会会刊

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自动化测试设备SiP芯片放置状态监测系统设计

何子龙,马美铭,王恒彬,钱威成,唐志俊   

  1. 中国电子科技集团公司第五十八研究所,江苏 无锡  214135
  • 收稿日期:2026-03-15 修回日期:2026-04-05 出版日期:2026-04-13 发布日期:2026-04-13
  • 通讯作者: 何子龙

Design of an Automated Test Equipment SiP Chip Placement Status Monitoring System

HE Zilong, MA Meiming, WANG Hengbin, Qian Weicheng, Tang Zhijun   

  1. China Electronics Technology Group Corporation NO.58 Research Institute, Wuxi 214135, China
  • Received:2026-03-15 Revised:2026-04-05 Online:2026-04-13 Published:2026-04-13

摘要: 集成电路自动化测试过程中,由于定位偏差可能导致芯片放置在插座中的位置偏移,最终引发芯片损伤和报废的风险。系统级封装(SiP)芯片主要应用于卫星、雷达系统及智能化设备等高技术领域,由于其内部构造精密且制造工艺复杂,其生产成本高昂,在自动化测试过程中尤其需避免上述情况的产生。本文设计了一种SiP芯片放置状态监测系统,通过检测芯片是否遮挡预埋在芯片测试插座中光纤的对射路线,以决定自动化测试设备是否继续执行后续测试操作。系统在检测到异常状态时会立即发出警报,从而有效降低自动化检测过程中的额外经济损失。

关键词: 分选机, SiP, 监测系统, 芯片测试

Abstract: During the automated testing process of integrated circuits, positioning deviation may cause the chip to be placed offset in the socket, ultimately leading to the risk of chip damage and scrapping. System-in-Package (SiP) chips are mainly applied in high-tech fields such as satellites, radar systems, and intelligent devices. Due to their precise internal structure and complex manufacturing process, their production costs are high. In particular, the above situation needs to be avoided during the automated testing process. This paper designs a monitoring system for the placement status of SiP chips. By detecting whether the chip blocks the opposite-emitting route of the optical fiber embedded in the chip test socket, it determines whether the automated testing equipment will continue to perform subsequent testing operations. When the system detects an abnormal state, it will immediately issue an alarm, thus effectively reducing the additional economic losses during the automated detection process.

Key words:  sort machine, SiP, monitor system, chip test