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电子与封装

• 电路与系统 •    下一篇

正电压控制的0.1~2.5 GHz GaAs pHEMT SPDT开关

姜严,周文威   

  1. 南京邮电大学集成电路科学与工程学院,南京  210023
  • 收稿日期:2026-06-09 修回日期:2026-07-12 出版日期:2026-07-17 发布日期:2026-07-17
  • 通讯作者: 周文威

0.1-2.5 GHz GaAs pHEMT SPDT Switch with Positive Voltage Controlled

JIANG Yan, ZHOU Wenwei   

  1. School of Integrated Circuit Science and Engineering, Nanjing University of Posts and Telecommunications, Nanjing 210023, China
  • Received:2026-06-09 Revised:2026-07-12 Online:2026-07-17 Published:2026-07-17

摘要: 针对传统负电压控制砷化镓(GaAs)赝配高电子迁移率晶体管(pHEMT)单刀双掷(SPDT)开关存在的电源复杂度高与隔直电容面积过大的问题,提出一种基于0.25 μm GaAs pHEMT工艺的正电压控制的0.1~2.5 GHz SPDT开关拓扑。利用串联支路引入电感与晶体管中的寄生电容构成谐振网络来降低插入损耗,并增设隔直电容阻断直流泄漏,结合偏置电阻构建+5 V源极电位控制层,实现耗尽型晶体管栅源电压(Vgs)的正电压调控。测试表明:相较于传统负压方案,该设计消除了负电源需求,缩减了隔直电容面积,实测插入损耗仅0.93 dB、隔离度大于14.08 dB,插入损耗仅0.93 dB,芯片尺寸1.5 mm×1.1 mm,验证了正压架构可以实现结构简单,低损耗,高隔离,芯片面积小,集成度高等方面的综合优势。

关键词: 砷化镓(GaAs), 正电压控制开关, 单刀双掷开关(SPDT), 低损耗

Abstract: To address the challenges of complex power supply requirements and excessive chip area occupied by large DC-blocking capacitors in conventional negatively biased GaAs pseudomorphic high electron mobility transistor (pHEMT) single-pole double-throw (SPDT) switches, this paper proposes a novel 0.1-2.5 GHz SPDT switch topology based on a 0.25 μm GaAs pHEMT process with positive-voltage control. The design introduces series inductors in the RF signal paths to form resonant networks with the parasitic capacitances of the transistors, thereby effectively reducing insertion loss. DC-blocking capacitors are employed to suppress unwanted DC leakage, while bias resistors establish a +5 V source potential, enabling the gate-source voltage(Vgs) of depletion-mode transistors to be modulated using a single positive control voltage. Measurement results demonstrate that, compared to conventional negative-voltage-controlled counterparts, the proposed design eliminates the need for negative biasing, significantly reduces the footprint of DC-blocking capacitors, and achieves an isolation greater than 14.08 dB. These results verify the advantages of the positive-voltage architecture in terms of simplified biasing, reduced loss, high isolation, compact layout, and high integration capability.

Key words: gallium arsenide (GaAs), positive voltage control switch, SPDT switch, low loss