中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2024, Vol. 24 ›› Issue (7): 070301 . doi: 10.16257/j.cnki.1681-1070.2024.0067

• 电路与系统 • 上一篇    下一篇

一种基于汉明码纠错的高可靠存储系统设计

史兴强,刘梦影,王芬芬,陆皆晟,陈红   

  1. 中国电子科技集团公司第五十八研究所,江苏 无锡? 214035
  • 收稿日期:2024-01-02 出版日期:2024-09-10 发布日期:2024-09-10
  • 作者简介:史兴强(1976—),男,江苏宜兴人,本科,高级工程师,主要研究方向为大规模集成电路设计及低功耗技术。

Design of a High-Reliability Storage System Based on Hamming Error Correction Code

SHI Xingqiang, LIU Mengying, WANG Fenfen, LU Jiesheng, CHEN Hong   

  1. China ElectronicsTechnology Group Corporation No.58 ResearchInstitute, Wuxi 214035, China
  • Received:2024-01-02 Online:2024-09-10 Published:2024-09-10

摘要: 为提高片上存储的可靠性,设计了一种基于汉明码纠错的高可靠性存储系统。该电路包括检错纠错(ECC)寄存器模块和ECC_CTRL模块。CPU可通过高级高性能总线(AHB)配置ECC寄存器以实现相应功能,SRAM和Flash的读写数据则通过ECC_CTRL模块进行校验码的生成和数据的检错纠错。仿真结果表明,该高可靠存储系统能够检测单bit和双bit错误,纠正单bit错误,提高了数据存储的可靠性,同时可将发生错误的数据和地址锁存在寄存器中,以便用户规避访问发生错误的地址。

关键词: 汉明码, 高可靠性, 存储系统, 检错纠错

Abstract: In order to enhance the reliability of on-chip storage, a high-reliability storage system based on Hamming code error correction is designed. This circuit is composed of an error detection and correction(ECC) register module and an ECC_CTRL module. The CPU can configure ECC registers through the advanced high-performance bus (AHB) to implement respective functions. The read and write data of SRAM and Flash is processed through the ECC_CTRL module for checksum generation and data error detection and correction. Simulation results demonstrate that this high-reliability storage system can detect single-bit and double-bit errors, and correct single-bit errors, thereby improving the reliability of data storage. Moreover, this circuit can lock erroneous data and addresses into registers, allowing users to avoid accessing erroneous addresses.

Key words: Hamming code, high-reliability, storage system, error detection and correction

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