中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2022, Vol. 22 ›› Issue (5): 050304 . doi: 10.16257/j.cnki.1681-1070.2022.0507

• 电路与系统 • 上一篇    下一篇

一种基于扩展汉明码的动态纠错机制

陈天培1,2;吴校生1;强小燕2   

  1. 1. 上海交通大学微米/纳米加工技术国家级重点实验室,上海 ?200240; 2. 中科芯集成电路有限公司,江苏 无锡 ?214072
  • 收稿日期:2021-09-22 出版日期:2022-05-26 发布日期:2021-12-03
  • 作者简介:陈天培(1998—),男,江苏泰州人,硕士研究生,现从事数字IC设计工作。

A Dynamic Error Correction Mechanism Based on ExtendedHamming Code

CHEN Tianpei1,2, WU Xiaosheng1, QIANG Xiaoyan2   

  1. 1.National Key Laboratory of Science and Technology on Micro/NanoFabrication, Shanghai Jiao Tong University, Shanghai 200240,China; 2. China Key System & Integrated Circuit Co.,Ltd.,
  • Received:2021-09-22 Online:2022-05-26 Published:2021-12-03

摘要: 错误纠正码(Error Correction Code,ECC)是解决存储器数据出现一位或两位错误的一种有效手段,然而过于复杂的编码方式将降低读写性能。为解决该问题,提出了一种基于扩展汉明码的动态纠错机制。利用扩展汉明码的奇偶校验位对检错模块进行了优化,能够监测错误发生的频率,并可动态切换进行扩展汉明码校验与奇偶校验。运用Verilog硬件描述语言实现了该机制并进行了仿真分析。分析结果表明,使用该机制与使用扩展汉明码校验相比,能够有效降低路径延时与动态功耗。

关键词: 错误纠正码, 动态纠错机制, 扩展汉明码, 路径延时, 动态功耗

Abstract: Error correction codes (ECC) are effective means to deal with single-bit or double-bit errors in data. However, an overly complex encoding method will reduce read and write performance. To solve this problem, a dynamic error correction mechanism based on the extended Hamming code is proposed. The parity bit included in the extended Hamming code is used to optimize the error detection module, and it can perform extended Hamming code and parity check dynamically. The hardware description language Verilog is used to realize the mechanism, and the simulation is carried out. The analysis results show that using this mechanism can effectively reduce dynamic power consumption compared with using extended Hamming code verification.

Key words: errorcorrectioncodes, dynamicerrorcorrectionmechanism, extendedHammingcode, pathdelay, dynamicpower

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