关键词: 栅电流, 浅沟槽隔离, 隧穿, 能带结构

Abstract: With the rapid development of the CMOS technology, shallow trench isolation (STI) has become a major concern in recent years. This paper analyzed the influence of STI on gate and substrate current through testing current in different MOS devices with different SA distances between gate edge and active region edge. The results show that gate current decreases as SA instance decreases initially and increases afterwards. The results also show that the substrate current always decreases as SA instance decreases under high and normal temperature. The reason of gate and bulk currents changing with STI is due to mobility and barrier changing with STI. The influence of STI on substrate current is fitted by improved universal Berkeley short-channel IGFET model(BSIM). Substrate model is provided to designer for low power designing.

Key words: gate current, shallow trench isolation, tunneling, band structure