中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2021, Vol. 21 ›› Issue (1): 010101 . doi: 10.16257/j.cnki.1681-1070.2021.0105

• 封面文章 •    下一篇

面向窄节距倒装互连的预成型底部填充技术*

王瑾1,石修瑀1,王谦1,2,蔡坚1,2,贾松良1   

  1. 1.清华大学微电子学研究所,北京 100084;2.北京信息科学与技术国家研究中心,北京 100084
  • 收稿日期:2020-07-08 出版日期:2021-01-20 发布日期:2020-08-28
  • 作者简介:王 瑾(1995—),女,山西汾阳人,硕士研究生,研究方向为三维集成封装。

Development of PreassemblyUnderfill for Fine Pitch Flip Chip Interconnection

WANG Jin1, SHI Xiuyu1, WANG Qian1,2, CAI Jian1,2, JIA Songliang1   

  1. 1. Institute of Microelectronics, Tsinghua University, Beijing 100084, China;
  • Received:2020-07-08 Online:2021-01-20 Published:2020-08-28

摘要: 近年来随着电子产品的小型化发展,窄节距倒装芯片互连已经成为研究热点。传统的倒装芯片组装后底部填充技术(例如底部毛细填充)在用于窄节距互连时易产生孔洞,导致可靠性降低,因此产业界开发了面向窄节距倒装芯片互连的预成型底部填充技术,主要包括非流动底部填充和圆片级底部填充。介绍了这类新型底部填充技术的具体工艺及材料需求,并提出了目前其在大规模量产以及未来更窄节距应用中存在的问题及挑战,总结了目前产业界在提高量产生产效率、提升电互连的可靠性以及开发纳米级高热导率填料等方面提出的解决方案,分析了该技术未来的发展方向。

关键词: 预成型底部填充, 窄节距, 倒装芯片

Abstract: With the miniaturization of electronic products, fine pitch flip chip interconnection has become one of the indispensable technologies and attracted extensive attention worldwide. However, the traditional underfill process (such as capillary underfill) would be easier to produce voids when applied in fine pitch flip chip interconnection, which will reduce the reliability. Therefore, preassembly underfill is proposed for fine pitch interconnection, which includes no-flow underfill and wafer-level underfill. In this work, the specific technical processes and materials of this novel preassembly underfill technology are introduced. The technical problems encountered in actual mass production and the corresponding solutions proposed in the current researches are summarized and analyzed. The development tendency of preassembly underfill, mainly focused on mass production improvement, electric reliability enhancement and nano-fillers with high thermal conductivity, is concluded which will provide new directions for further research.

Key words: preassemblyunderfill, finepitch, flipchip

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