基于FPGA的JPEG-XS高性能解码器硬件架构设计

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郑畅,吴林煌,李雅欣,刘伟

Design of a High-Performance JPEG-XS Decoder Hardware Architecture Based on FPGA

ZHENG Chang, WU Linhuang, LI Yaxin, LIU Wei

电子与封装 . 2025, (2): 20303 . DOI: 10.16257/j.cnki.1681-1070.2025.0019