中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2017, Vol. 17 ›› Issue (11): 6 -9. doi: 10.16257/j.cnki.1681-1070.2017.0127

• 封装、组装与测试 • 上一篇    下一篇

无压惰性气氛银烧结层空洞率影响因素研究*

李聪成1,2,滕鹤松1,2,王玉林1,2,徐文辉1,2,牛立刚1,2,彭 浩1,2   

  • 收稿日期:2017-05-11 出版日期:2017-11-20 发布日期:2017-11-20
  • 作者简介:李聪成(1989—),男,2015年毕业于天津大学,获材料加工工程硕士学位,同年进入中国电子科技集团公司第五十五研究所,主要从事功率模块封装工艺的研究开发工作。

The Research of Factors Affecting Void Ratio in Pressureless Silver Sintering Layer

LI Congcheng1,2,TENG Hesong1,2,WANG Yulin1,2,XU Wenhui1,2,,NIU Ligang1,2,PENG Hao1,2   

  1. 1.China Electronics Technology Group Corporation No.55 Research Institute,Nanjing 210016,China;2.Yangzhou Guoyang Electronics Co.,Ltd.,Yangzhou 225100,China
  • Received:2017-05-11 Online:2017-11-20 Published:2017-11-20

摘要: 在SiC功率模块的封装中,银烧结技术被认为是连接芯片到基板最为合适的技术。裸铜表面无压银烧结技术无需在芯片表面施加压力,降低芯片损伤风险;基板铜层无需贵金属镀层,提高了烧结层的可靠性,降低了材料成本。对裸铜表面无压银烧结技术展开研究,对于6.3 mm×6.3 mm及以下面积的芯片得到了空洞情况良好的烧结层。对影响烧结层空洞率的因素进行了研究,分析了芯片面积、烧结温度曲线、抽真空步骤和贴片质量对烧结层空洞率的影响。

关键词: 银烧结技术, 裸铜基板, 无压烧结, 空洞率, 封装

Abstract: Silver sintering technology is considered as the most suitable choice of die attach method in SiC power module packing.With no pressure applying on the surface of die,pressureless silver sintering technology on bare copper substrates reduces the risk of die damage.The plating of noble metal is not necessary,which improves the reliability of sintering layer and reduces the cost of substrates.Pressureless silver sintering technologyon bare copper was researched in the paper.No obvious voids was found in sintering layer when the diesusedare 6.3mm×6.3mm indimension(width×length)or smaller.The factors affectingvoid ratioin sintering layer,such as die dimension,sintering temperature profile,vacuumize process and die placement quality,were researched.

Key words: silver sintering technology, bare copper substrates, pressureless sintering, void ratio, packaging

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