关键词: 射频集成电路, 静电放电, SiGe BiCMOS工艺

Abstract: With the increase ofthe frequencyof the radio frequencyintegrated circuits(RFIC),ESD has become a serious issue affecting the reliability and RF performance.An I/O ESD protection circuit and a power clamp circuit have been designed for high-speed RF circuit.And the beveled interdigital diode is used to do the layout and performance optimization.The proposed circuit is fabricated in Jazz 0.18 μm SiGe BiCMOS process.After the test,the protection voltage of the circuits is up to 3000 V.A higher protection level can be achieved by changingtheinterdigitalnumberofthediodes.Andtheprotectionvoltageoftheimprovedcircuitisupto4500V.

Key words: RFIC, ESD, SiGe BiCMOS Technology