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中国电子学会电子制造与封装技术分会会刊

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• 材料、器件与工艺 •    下一篇

基于0.18 μm BCD工艺的抗辐射ESD防护器件GGNMOS优化设计

陆素先,程淩,朱琪,李现坤,李娟,严正君   

  1. 中国电子科技集团公司第五十八研究所,江苏 无锡  214035
  • 收稿日期:2024-11-17 修回日期:2025-01-18 出版日期:2025-01-23 发布日期:2025-01-23
  • 通讯作者: 陆素先

Optimized Design of Radiation-Hardened ESD Protection Device GGNMOS Based on 0.18 μm BCD Process

LU Suxian, CHENG Ling, ZHU Qi, LI Xiankun, LI Juan, YAN Zhengjun   

  1. China Electronics Technology Group Corporation No.58 Research Institute, Wuxi 214035, China
  • Received:2024-11-17 Revised:2025-01-18 Online:2025-01-23 Published:2025-01-23

摘要: 在静电放电(ESD)防护结构中,栅极接地NMOS(GGNMOS)器件具有结构简单、响应迅速、高效泄放等多方面的优势,逐渐成为ESD防护结构中最常用的器件。但辐照试验时NMOS器件会受到多种辐射效应的影响导致器件性能和可靠性下降。因此抗辐射电路中GGNMOS器件的保护结构设计尤为困难。基于0.18 μm BCD工艺,设计了一款有抗辐射需求的线性稳压器电路。根据各端口电压和工作特点设计该电路全芯片的ESD防护结构,通过试验分析得出GGNMOS保护结构的薄弱点并提出改进方案。根据实测结果显示,所设计的电路不仅满足100 krad(Si)的总剂量指标,还通过了2.5 kV的人体模型ESD测试。该研究为以后抗辐射电路中ESD器件设计提供了实验依据和理论指导。

关键词: ESD防护, 栅接地NMOS, 抗辐射, 寄生三极管

Abstract: In electrostatic discharge (ESD) protection structures, gate grounded NMOS (GGNMOS) devices have the advantages of simple structure, fast response, and efficient discharge, and have gradually become the most commonly used devices in ESD protection structures. However, during irradiation testing, NMOS devices are affected by various radiation effects, leading to a decrease in device performance and reliability. Therefore, the design of protective structures for GGNMOS devices in radiation resistant circuits is particularly difficult. A linear regulator circuit with rasdiation resistance requirements was designed based on 0.18 μ m BCD technology. Design the ESD protection structure for the entire chip of the circuit based on the voltage and operating characteristics of each port. Through experimental analysis, identify the weak points of the GGNMOS protection structure and propose improvement solutions. According to the actual test results, the designed circuit not only meets the total dose index of 100 krad (Si), but also passes the 2.5 kV human body model ESD test. This study provides experimental basis and theoretical guidance for the design of ESD devices in future radiation resistant circuits.

Key words: ESD protection,  gate grounded NMOS, radiation-hardened, parasitic bipolar transistor