关键词: 数字波束合成, FPGA验证, 原型验证, 树莓派, 多片级联

Abstract: Digital beam forming (DBF) chip is a kind of complex operation application specific integrated circuit (ASIC) chip, and its verification work before chip flow is crucial to improve the success rate of the chip. This paper proposes a field programmable gate array (FPGA)-based prototyping system construction method, using the Quad VU verification board and Raspberry Pi development board of Silicon Power Technology to simulate the application scenario after chip flow. By reasonably trimming the chip design code, replacing the non-compilable modules of FPGA, and redesigning the clock architecture, the functional verification of digital beam synthesis chip on FPGA is realized. The experimental results show that the system can effectively verify the data processing flow and multi-slice cascade function of the chip, which lays a solid foundation for chip back test.

Key words: digital beam synthesis, FPGA verification, prototyping, Raspberry Pi, multichip cascade