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抑制剂分子结构对电沉积铜镀层电学性能的影响

张耿华1,2,高丽茵1,2,曾方元1,刘志权3   

  1. 1. 中国科学院深圳先进技术研究院,广东 深圳  518055;2. 中国科学院大学,北京  100049;3. 南方科技大学半导体学院(国家卓越工程师学院),广东 深圳  518055
  • 收稿日期:2026-02-09 修回日期:2026-03-12 出版日期:2026-03-19 发布日期:2026-03-19
  • 通讯作者: 高丽茵
  • 基金资助:
    国家自然科学基金项目(92373208,62574212)

Effect of Inhibitor Molecular Structure on the Electrical Properties of Electrodeposited Copper Plating

ZHANG Genghua1,2, GAO Liyin1,2, Zeng Fangyuan1, LIU Zhiquan3   

  1. 1. Shenzhen Institutes of Advanced Technology, Chinese Academy of Sciences, Shenzhen 518055, China; 2. University of Chinese Academy of Sciences, Beijing 100049, China; 3. College of Semiconductors (National Graduate College for Engineers), Southern University of Science and Technology, Shenzhen 518055, China
  • Received:2026-02-09 Revised:2026-03-12 Online:2026-03-19 Published:2026-03-19
  • Contact: Li-Yin Gao
  • Supported by:

摘要: 本研究考察了三种分子量相同但分子结构不同的非离子抑制剂,具体为线性聚乙二醇(PEG)、芳香族空间位阻型抑制剂(NP-40)以及环氧乙烷-环氧丙烷嵌段共聚物(EO-PO)。电化学分析表明,尽管在不添加SPS的情况下,各组分的极化行为相似,但在共添加SPS的条件下,极化行为出现了显著差异,CV曲线表明,极化能力:NP-40>EO-PO>PEG。进一步对在抑制剂与SPS共存条件下制备的铜镀层进行了微观组织表征、杂质测试和电学性能测试。EO-PO样品对应镀层具有相对较小的晶粒尺寸(1.7 μm),同时表现出较大的电阻率和较高的杂质含量;经过150°C退火后该体系出现显著的晶粒长大现象,这一现象应该源于细晶组织具备的较高的晶粒生长驱动力,其作用强度远超杂质元素的晶界钉扎效应,使得杂质的钉扎作用被掩盖。但值得注意的是,在退火过程的电阻率演变规律中,杂质元素仍为不可忽略的重要控制因素。相比之下,NP-40样品在具有最佳的抑制能力的同时还能保持相对较低的电阻率和杂质残留。这些发现为合理设计用于先进铜互连电沉积的抑制剂提供了理论基础,从而提高铜镀层的电学性能。

关键词: 抑制剂, 电镀铜, 微观组织, 杂质, 电学性能

Abstract: This study investigated three nonionic inhibitors with the same molecular weight but different molecular structures: linear polyethylene glycol (PEG), an aromatic sterically hindered inhibitor (NP-40), and an ethylene oxide-propylene oxide block copolymer (EO-PO). Electrochemical analysis showed that although the polarization behavior of each component was similar without the addition of SPS, significant differences in polarization behavior occurred under the condition of co-addition of SPS. The CV curves showed that the polarization ability was: NP-40 > EO-PO > PEG. Further microstructure characterization, impurity testing, and electrical performance testing were performed on the copper coatings prepared under the coexistence of inhibitors and SPS. EO-PO sample exhibited a relatively small grain size (1.7 μm) and a high resistivity and elevated impurity content. After annealing at 150°C, a remarkable grain growth was observed in this system, which can be attributed to the high grain growth driving force inherent in the fine-grained microstructure. The intensity of this driving force far exceeded the grain boundary pinning effect of impurity elements, thus masking the pinning effect of impurities.Notably, however, impurity elements remained a significant and non-negligible controlling factor in resistivity evolution. In contrast, NP-40 sample not only demonstrated the optimal inhibition capacity but also maintained a relatively low electrical resistivity and minimal impurity residue. These findings provide a theoretical basis for the rational design of inhibitors for advanced copper interconnect electrodeposition, thereby improving the electrical properties of copper plating.

Key words: inhibitors, copper plating, microstructure, impurities, electrical properties