中国电子学会电子制造与封装技术分会会刊

中国半导体行业协会封测分会会刊

无锡市集成电路学会会刊

导航

电子与封装

• 电路与系统 •    下一篇

基于SYSMON的PCIe链路稳定性优化方案研究及实现

谢文虎,盛沨,仲伟汉,谢达,季振凯   

  1. 无锡中微亿芯有限公司,江苏 无锡  214072
  • 收稿日期:2026-03-02 修回日期:2026-04-03 出版日期:2026-04-14 发布日期:2026-04-14
  • 通讯作者: 盛沨
  • 基金资助:
    国家重点研发计划(2024YFB4505402);江苏省科技重大专项-揭榜挂帅项目(BG2024032);国家自然科学基金(92573203)

Research and Practical Implementation of an Optimized Scheme for PCIe Link Stability Using SYSMON

XIE Wenhu, SHENG Feng, ZHONG Weihan, XIE Da, JI ZHenkai   

  1. Wuxi Esiontech Co., Ltd., Wuxi 214072, China
  • Received:2026-03-02 Revised:2026-04-03 Online:2026-04-14 Published:2026-04-14

摘要: 高速外围组件互联(PCIe)作为服务器与外设间的核心互联总线,其链路稳定性直接决定系统整体可靠性。针对复杂温度环境下的信号衰减、干扰等因素易导致PCIe链路误码甚至中断的问题,本文提出一种基于现场可编辑门阵列(FPGA)内部系统监控器(SYSMON)的PCIe链路稳定性优化设计方案。该方案首先通过宽温范围(-55~125 ℃)内全温度点遍历测试,精准标定温度阈值与最优链路参数组合;系统架构中引入SYSMON模块实现温度数据实时采集,PCIe链路比较实测温度与预设阈值动态切换参数配置,同时上位机实时可视化链路状态并反馈异常信息。通过搭建数据回环测试平台,在极端环境温度下对10只目标芯片的链路进行反复测试。结果表明,优化方案在极限高温环境下的建链成功率提升至100%,显著优于传统方案,充分验证了该优化方案的高可靠性与工程实用价值。

关键词: PCIe, 温度, SYSMON, 链路建链, 稳定性

Abstract:

Peripheral Component Interconnect Express (PCIe) serves as the core interconnection bus between servers and peripheral devices, and its link stability directly determines the overall reliability of the system. Aiming at the problem that signal attenuation, interference and other factors in complex temperature environments are prone to cause PCIe link bit errors and even interruptions, this paper proposes an optimized design scheme for PCIe link stability based on the System Monitor (SYSMON) inside the Field-Programmable Gate Array (FPGA). First, the scheme conducts a full temperature point traversal test within a wide temperature range (-55-125 ℃) to accurately calibrate the temperature thresholds and optimal link parameter combinations. In the system architecture, the SYSMON module is introduced to realize real-time acquisition of temperature data; the PCIe link dynamically switches parameter configurations by comparing the measured temperature with the preset thresholds, and the upper computer visualizes the link status in real time and feeds back abnormal information. A data loopback test platform was constructed to conduct repeated tests on the links of ten target chips under extreme ambient temperatures. The results show that the link establishment success rate of the optimized scheme reaches 100% under extreme high-temperature environments, which is significantly superior to the traditional scheme, fully verifying the high reliability and engineering practical value of the optimized scheme.

Key words: PCIe, temperature, SYSMON, link establishment, stability