关键词: 多晶后氧化, 静态电流, CMOS电路

Abstract: This paper selected two different CMOS process technologies (1.0 μm and 1.5 μm). For each process, comparative experiments were conducted involving either one-time or two-time post-oxidation steps after polysilicon (poly) gate etching. Additionally, comparative experiments were performed by conducting a single post-oxidation step at two different stages: immediately after poly etching and after impurity implantation. By comparing the chip probing (CP) test yield, quiescent power supply current (IDDQ) data, and failure rate proportion of the experimental samples from the two groups, it was found that performing a second post-oxidation step immediately after poly etching can significantly reduce the proportion of IDDQ failures and improve product yield.

Key words: polycrystalline post-oxidation, static current, CMOS circuits