中国电子学会电子制造与封装技术分会会刊

中国半导体行业协会封测分会会刊

无锡市集成电路学会会刊

导航

电子与封装

• 封装、组装与测试 •    下一篇

硅基芯片金硅共晶焊可靠性影响分析

薛爱杰,陈骏,陈寰贝,马凌志   

  1. 南京电子器件研究所,南京  210016
  • 收稿日期:2026-01-12 修回日期:2026-04-26 出版日期:2026-04-27 发布日期:2026-04-27
  • 通讯作者: 薛爱杰

Analysis of Factors Affecting the Reliability of Au-Si Eutectic Bonding in Silicon-Based Chips

XUE Aijie, CHEN Jun, CHEN Huanbei, MA Lingzhi   

  1. Nanjing Electronic Devices Institute, Nanjing 210016, China
  • Received:2026-01-12 Revised:2026-04-26 Online:2026-04-27 Published:2026-04-27

摘要: 硅基芯片焊接自动化在大功率高可靠集成电路的生产中的需求越来越多,基于行业中常用的金硅焊接工艺,分析了不同背金结构芯片和不同镀层管壳的焊接过程,讨论了硅原子在不同界面中扩散后对产品可靠性的影响。通过在管壳镀层中添加Co作为阻挡层,可以有效抑制芯片中的硅与镍反应形成不利于结合的金属间化合物层,保证焊接后的界面结合,拓宽焊接工艺窗口,通过极限试验验证了硅基芯片金硅焊接的高可靠性。

关键词: 金硅焊接, 芯片背金, 阻挡层, 原子扩散, 可靠性

Abstract: The demand for automated silicon-chip soldering is increasingly growing in the production of high-power and high-reliability integrated circuits. Based on the industry-standard gold-silicon soldering process, the Au-Si bonding processes for chips with different gold-backing structures and different plated tube shells is analyzed. The impact of silicon atom diffusion across interfaces on product reliability is systematically discussed. The study demonstrates that adding cobalt as a barrier layer to the package plating effectively inhibits the reaction between silicon from the chip and nickel preventing the formation of brittle intermetallic compound layers that are detrimental to bonding. This approach ensures excellent post-soldering interfacial integrity and broadens the process window. Furthermore, the high reliability of the gold-silicon soldering for silicon chips was validated through rigorous extreme testing.

Key words: Au-Si eutectic bonding, gold-plated chip, barrier layer, atomic diffusion, reliability