中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2023, Vol. 23 ›› Issue (9): 090204 . doi: 10.16257/j.cnki.1681-1070.2023.0117

• 封装、组装与测试 • 上一篇    下一篇

数字隔离器的失效分析及解决对策

傅铮翔,李飞   

  1. 中国电子科技集团公司第五十八研究所,江苏 无锡?214035
  • 收稿日期:2023-03-09 出版日期:2023-09-25 发布日期:2023-09-25
  • 作者简介:傅铮翔(1985—),男,江苏无锡人,学士,工程师,主要从事集成电路质量管理、失效分析方面的研究。

Failure Analysis and Solution of Digital Isolators

FU Zhengxiang,LI Fei   

  1. China Electronics Technology Group Corporation No. 58Research Institute, Wuxi 214035, China
  • Received:2023-03-09 Online:2023-09-25 Published:2023-09-25

摘要: 某航天电子系统采用的某型号隔离器电路上电时信号传输异常。针对异常点建立故障分析树,对失效电路中的编码芯片、变压器芯片、低压差线性稳压器(LDO)及解码芯片进行失效点定位。通过内部电路的带隙基准(BGR)、误差放大器输出关键节点扎针测试、ATE上电斜率测试、供电电源上电仿真等手段分析出故障电路因存在制造工艺偏差,BGR在低上电斜率时不能正确建立,进而导致LDO输出异常,该类失效可通过加ATE测试程序进行有效剔除。针对该问题进行了板级测试验证,为电路改版及同类电路设计提供了依据。

关键词: 数字隔离器, 失效分析, 带隙基准, 工艺偏差

Abstract: When a certain aerospace electronic system uses a certain type of digital isolator circuit, the signal transmission is abnormal when it is powered on.The fault-analysis-tree is established for the abnormal points, and the failure points of the coding chip, transformer chip, low dropout regulator (LDO) and decoding chip in the failure circuit are located. By band-gap reference(BGR) of internal circuit, pin test of error-amplifier output, ATE power on slope test, power supplyon simulation and other means, it is found that the fault circuit has manufacturing process deviation, which leads to the BGR cannot be established correctly when the power on slope is low, thus leading to abnormal LDO output. Such failures can be effectively eliminated by tightening ATE test program. The board level test verification is carried out to solve this problem, which provides a basis for the subsequent circuit revision and similar circuit design.

Key words: digital isolators, failure analysis, band-gap reference, process variation

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