一种高增益、高带宽全差分运算放大器的设计

doi:10.16257/j.cnki.1681-1070.2023.0089

摘要/Abstract

摘要： 采用增益提升（Gain-boosting）技术，使用2个三输入管的折叠式共源共栅运算放大器（运放）作为辅助运放，设计了一种宽输入共模范围的高增益、高带宽的全差分运算放大器。主运放输入部分由一对NMOS管和一对PMOS管共同构成，其输入跨导提高至由单MOS管构成的运放输入跨导的2倍。主运放输入跨导的提高间接提升了主运放的增益和带宽。而辅助运放在不改变主运放带宽的同时，通过降低主运放的主极点增大输出阻抗，再次提升主运放的增益，达到了高增益、高带宽的目的。该运算放大器采用商用55 nm CMOS工艺设计，经仿真可得，当负载电容为5 pF时，运放低频增益为115 dB，增益带宽积为209 MHz，总功耗为2.8 mW。

关键词: 全差分运算放大器, 增益提升, 带宽, 共模反馈

Abstract: A gain-boosting technique is used to design a highgain, highbandwidth, fully differential operational amplifier (op-amp) with a wide input common-mode range, using two folded common source and common gate op-ampswith three-input tubes as auxiliary op-amps.The main op-amp input section consists of a pair of NMOS tubes and a pair of PMOS tubes, and the main op-amp input transconductance to twice that of an op-amp consisting of a single MOS tube. The increase in the main op-amp's input transconductance indirectly increases the main op-amp's gain and bandwidth. While the auxiliary op-amps do not change the bandwidth of the main op-amp, and they increase the gain of the main op-amp again by reducing the main op-amp pole to increase the output impedance, achieving the purpose of high gain and high bandwidth.The op-amp is designed using a commercial 55 nm CMOS process, and simulation results show that the op-amp has a low-frequency gain of 115 dB, a gain bandwidth product of 209 MHz, and a total power consumption of 2.8 mW when the load capacitance is 5 pF.

Key words: fully differential operational amplifier, gain-boosting, bandwidth, common-mode feedback

中图分类号:

TN722.7

彭春雨;张伟强;蔺智挺;吴秀龙. 一种高增益、高带宽全差分运算放大器的设计[J]. 电子与封装, 2023, 23(7): 070302 .

PENG Chunyu,ZHANG Weiqiang,LIN Zhiting,WU Xiulong. Design of a High Gain, High Bandwidth, Fully Differential Operational Amplifier[J]. Electronics & Packaging, 2023, 23(7): 070302 .

参考文献

[1]KLOKA M, TANG H. Design of a gain-boosted amplifier for differential bottom-plate sampling in 0.13-μm CMOS[C]//2019 IEEE International Conference on Electro Information Technology (EIT), Brookings, SD, USA, IEEE,2019:145-148.
[2]ZHANG S F,ZHU Z,ZHANG H,et al. A 90-dB DC gain high-speed nested gain-boosted folded-cascode opamp[C]// 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Glasgow, IEEE,2019:357-360.
[3]SARKAR S, GHOSH A, CHATTERJEE T. Design of a 2 mW power, 112 dB gain-boosted, folded cascode amplifier in 0.18μm process[C]//2021 IEEE 30th International Symposium on Industrial Electronics (ISIE), Kyoto, Japan, IEEE,2021:1-5.
[4] GHOSH N N, TODANI R, CHAUDHURI C, et al. Simplified design method for fully differential gain-boosted folded cascode OTA[C]// 2013 IEEE Conference on Information & Communication Technologies, Thuckalay, India, IEEE,2013:943-948.
[5] BANDA G P,SEN S.A low voltage cascode biasing circuit with gain-boosting[C]//2015 IEEE International Conference on Electronics, Computing and Communication Technologies (CONNECT),Bangalore, India, IEEE,2015:1-4.
[6] KOUHALVANDI L,AYGUN S,GUNES E O,et al.An improved 2 stage opamp with rail-to-rail gain-boosted folded cascode input stage and monticelli rail-to-rail class ab output stage[C]//2017 24th IEEE International Conference on Electronics, Circuits, and Systems (ICECS),Batumi, IEEE,2017:542-545.
[7] AHMED M, SHAH L, TANG F, et al.An improved recycling folded cascode amplifier with gain boosting and phase margin enhancement[C]//2015 IEEE International Symposium on Circuits and Systems (ISCAS),Lisbon, Portugal, IEEE,2015:2473-2476.
[8] BEYGI M K, KHOSROWSHAHI F M, JAFARNEJAD R, et al. Application of folded cascode-based gain-boosting circuit in declining the current mismatch characteristics[C]//2020 28th Iranian Conference on Electrical Engineering (ICEE), Tabriz, Iran, IEEE,2020:1-4.
[9] HO M, BU S, ZHENG Y, et al.A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing[C]//2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS),Ishigaki, Japan, IEEE,2014:181-184.
[10] HUI W H, WOO Y H, HUNG C H, et al.A double gain-boosted amplifier with widened output swing based on signal- and transient-current boosting technique in CMOS 130-nm technology[C]//2018 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), Shenzhen, China, IEEE,2018:1-2.
[11]NI M, XIE Q, HE F, et al. A novel design of double gain boosting inductor cascode amplifier at near-fmax frequencies[C]//2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Nanjing, IEEE,2020:21-22.
[12] CHO T B, GRAY P R.A 10-bit, 20-MS/s, 35-mW pipeline A/D converter[J].IEEE Journal of Solid-State Circuits,1995(3):166-172.
[13] 聂凯明. 模拟域CMOS-TDI图像传感器中读出电路研究与设计[D].天津：天津大学，2016.
[14] 朱江南，杨兵，姜岩峰.一种高增益全差分运算放大器的分析与设计[J].微电子学,201, 45(6): 714-717.
[15] HOSTICKA B J. Improvement of the gain of MOS amplifiers[J].IEEE Journal of Solid-State Circuits,1979,14(6):1111-1114.
[16] PAUL A, RAMIREZ-ANGULO J, LOPEZ-MARTIN A J, et al.Super-gain-boosted miller op-amp based on nested regulated cascode techniques with FoMAOLDC=24614kV/V.MHz.pF/μWatt[C]//2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, IEEE,2020:1-5.
[17] SACKINGER E, GUGGENBUHL W.A high-swing, high-impedance MOS cascade circuit[J]. IEEE Journal of Solid-State Circuits,1990,25(1):289-298.
[18] 郑凯伦，郭桂良.一种高增益高电流效率的运算跨导放大器[J].微电子学与计算机,2020,37(6):51-56.
[19] YANG Y,BINKLEY D M,LI C.Modeling and optimization of fast-settling time gain-boosted cascodeCMOS amplifiers[C]//Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon),Concord, IEEE,2010:33-36.
[20] DASM. Improved design criteria of gain-boosted CMOS OTA with high-speed optimizations[J].IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing,2002,49(3):204-207.
[21] MA L,DINGY T,WANG X H.A folded cascode OTA using a current-mode gain-boost amplifier[C]//2010 IEEE International Conference on Semiconductor Electronics (ICSE2010),Malacca, IEEE,2010:92-95.
[22] JING K, YU N M, QUAN X. A 168 dB high gain folded cascode operational amplifier for Delta-Sigma ADC[C]//2019 14th IEEE Conference on Industrial Electronics and Applications (ICIEA), Xi'an, IEEE,2019:2228-2231.
[23] NAVIDI R,FATHI A,MOHAMMADI K,et al. Improved gain folded cascode opamp employing a novel positive feedback structure[C]//2019 27th Iranian Conference on Electrical Engineering (ICEE),Yazd, IEEE,2019:269-273.
[24] SARKAR S,GHOSH A,CHATTERJEE T.Design of a 2 mW power, 112 dB gain-boosted, folded cascode amplifier in 0.18μm process[C]//2021 IEEE 30th International Symposium on Industrial Electronics (ISIE), Kyoto, IEEE,2021:1-5.

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