中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2016, Vol. 16 ›› Issue (5): 26 -30. doi: 10.16257/j.cnki.1681-1070.2016.0059

• 电路设计 • 上一篇    下一篇

一款高增益、低功耗、宽带宽全差分运放设计

周吉,龚敏,高博   

  1. 四川省微电子技术重点实验室,四川大学物理学院,成都 610064
  • 收稿日期:2016-03-07 出版日期:2016-05-20 发布日期:2016-05-20
  • 作者简介:周吉(1990—),男,四川内江人,四川大学物理学院微电子学系硕士研究生,研究方向为超大规模集成电路设计。

Design of a Fully Differential High Gain and Low-power and High Bandwidth Amplifier

ZHOU Ji,GONG Min,GAO Bo   

  1. Key Laboratory of Micro-electronics Technology of Sichuan Province,College of Physical Science and Technology of Sichuan University,Chengdu 610064,China
  • Received:2016-03-07 Online:2016-05-20 Published:2016-05-20

摘要: 基于SMIC 0.18 μm工艺模型设计了一种低电压1.8 V下的高增益、低功耗、宽输出摆幅、宽带宽的运算放大器电路。采用增益自举技术的折叠共源共栅结构极大地提高了增益,并采用辅助运放电流缩减技术有效地降低了功耗,且具有开关电容共模反馈(SC-CMFB)电路。在Cadence spectre平台上仿真得到运放具有极高的开环直流增益(111.2 dB)和1.8 V的宽输出摆幅,单位增益带宽576 MHz,相位裕度为58.4°,功耗仅为0.792 mW,在1 pF的负载时仿真得到0.1%精度的建立时间为4.597 ns,0.01%精度的建立时间为4.911 ns。

关键词: 低功耗, 运算放大器, 高增益, 宽带宽, 折叠共源共栅

Abstract: A Low-voltage 1.8 V with High Gain and High unity bandwidth and low-power integrated operational amplifier was designed based on SMIC 0.18 μm CMOS process.Adopted gain-boosting technique in folded-cascode architecture greatly raised the gain.Used assisted-amplifier current scaling-down technique effectively reduced the power consumption,also had SC-CMFB circuit.Simulation results on Cadence spectre show that the DC open-loop gain is 111.2 dB and 1.8 V output swing with a unity gain frequency of 576 MHz and phase Margin of 58.4°,0.792 mW power dissipation only. Besides 4.597 ns setting time of a 0.1%accuracy and 4.911 ns setting time of a 0.01%accuracy under the 1 pF load.

Key words: low-power, operational amplifier, high gain, high bandwidth, folded-cascode

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