中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2023, Vol. 23 ›› Issue (8): 080304 . doi: 10.16257/j.cnki.1681-1070.2023.0112

• 电路与系统 • 上一篇    下一篇

反熔丝FPGA可配置I/O端口可测性设计研究

曹振吉;曹杨;隽扬;曹靓;马金龙   

  1. 中国电子科技集团公司第五十八研究所,江苏 无锡 214035
  • 收稿日期:2023-03-12 出版日期:2023-08-24 发布日期:2023-07-06
  • 作者简介:曹振吉(1989—),男,江苏徐州人,硕士,工程师,现从事IC设计工作。

Research on theDFT for ConfigurableI/OPorts of Antifuse FPGA

CAO Zhenji, CAO Yang, JUAN Yang, CAO Liang, MA Jinglong   

  1. China Electronics Technology Group Corporation No.58 Institute, Wuxi 214035, China
  • Received:2023-03-12 Online:2023-08-24 Published:2023-07-06

摘要: 反熔丝FPGA在生产阶段不能通过编程后测试对电路进行筛选,必须通过编程前测试来解决生产测试问题。在研究反熔丝型FPGA多标准可配置I/O端口电路结构的基础上,提出一种用于可配置I/O端口的可测性设计(DFT)方案,在可配置I/O端口中插入软配置电路和边界扫描链,实现对可配置端口的临时配置和扫描测试,覆盖所有支持的电平标准及各种可配置I/O功能。仿真及测试结果表明,该DFT能够满足反熔丝型FPGA多标准、可配置I/O端口的测试需求,能够解决可配置I/O在生产中的测试问题。

关键词: 反熔丝FPGA, 可配置I/O, 可测性设计

Abstract: For screening, antifuse FPGA cannot be programmed at the production stage. The way of testing before programming must be adopted. Based on the research of the structure of multi-standardconfigurable I/O of antifuse FPGA, a design for testability (DFT) for the I/O is proposed. By inserting soft-configured circuit and boundary scan chain into configurable I/O circuit, the DFT can achieve the purpose of temporary configuration and scanning test. All supported I/O standards and other configurable functions are covered. The simulation and test results show that the DFT can satisfy the testing demands of multi-standardconfigurable I/O interfaces and solve the problem of I/O testing for antifuse FPGA at the production stage.

Key words: antifuse FPGA, configurable I/O, DFT

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